Design of digital anti-noise module for airborne communications

Aguilera

Design of digital anti-noise module for airborne communications [Copy link]

This paper introduces a digital anti-noise module based on a dedicated DSP chip and a unique software anti-noise algorithm, which achieves a voice clarity of no less than 98 in a 120-decibel noise environment. This module has been successfully used in my country's airborne communication equipment.

Overview

The third generation of anti-noise products in China currently use dynamic noise reduction (DNR) technology. DNR technology dynamically adjusts the output voice switch through the changing voice peak value to achieve the purpose of noise reduction. Although it is currently a better anti-noise analog processing technology, it also has some limitations, including the loss of light notes and the tailing of strong noise; the noise reduction effect is biased towards low frequencies; the noise reduction is completely implemented by hardware circuits, and debugging and maintenance are more troublesome. Due to these problems, the large-scale promotion and application of analog DNR noise reduction products are limited. With the rapid development of digital signal processing technology, digital anti-noise technology products supported by digital signal processors and related algorithms are constantly emerging. The digital anti-noise module proposed in this paper uses modern digital signal processing (DSP) technology and its high-speed real-time processing and operation characteristics, and uses corresponding software algorithms to process voice and noise in high-noise environments and complete voice communication functions in high-noise environments.

The performance advantages of this module include:

a) The software adopts an adaptive filtering algorithm, and the digital anti-noise processor generally suppresses noise by more than 50 decibels, and the output voice is stable without missing words and noise tailing.

b) The digital anti-noise processor achieves balanced noise reduction in the entire voice band (300~3000Hz).

c) The digital anti-noise processor can meet different anti-noise requirements by changing the software algorithm, which is convenient for product upgrading.

d) The hardware cost is lower than that of analog DNR products.

e) The use of software encryption technology makes the products less likely to be infringed or counterfeited, which is beneficial to protecting the interests of manufacturers.

Main indicator requirements and overall solution ideas

As part of the JK-DP10 digital anti-noise processor, this digital anti-noise processing module is mainly used for communication in noisy environments such as airborne communication terminal equipment. Its transmission frequency range is 300~3400Hz, and the flatness is not greater than 2dB. The noise reduction performance is: when a 3mV, 2-second intermittent sine wave signal (frequencies are 300Hz, 700Hz, 1000Hz, 1500Hz, 2000Hz, 2500Hz, 3000Hz) is added to the module input end and a 3mV, 120dB continuous white noise signal is added, the difference in the module output level is not less than 50dB.

First, we need to select a suitable DSP device. It is required to have low power consumption, high-speed data calculation and throughput (more than 40 MIPS), and contain A/D, D/A, and Flash memory (16KB). Then, we establish an effective noise model, design an adaptive filter structure and its related software algorithms. Next, we design the electromagnetic compatibility (EMC) of the digital anti-noise processor, and select an anti-noise transmitter device that can adapt to 120dB environmental noise. The combination of DSP hardware and related software algorithms enables the digital anti-noise processor to achieve a voice clarity of no less than 98 in a 120dB high noise environment.

Software and hardware design solutions

Main working principle

This processor mainly completes the high-definition communication function of voice in a high-noise environment. The voice signal and environmental noise are input to the preamplifier stage through the MIC. The function of the preamplifier stage is to amplify the voice and environmental noise to the amplitude that the A/D in the dedicated DSP chip can recognize, so that the A/D can convert the signal normally. The analog signal is converted into a 12-bit digital signal after A/D conversion and enters the DSP calculation unit. The DSP completes the test of the size of the surrounding environmental noise and establishes a mathematical model within the first 3 seconds, and then processes the voice and noise according to the given algorithm, and sends the processing results to the D/A through the data bus, and then sends them to the post-amplifier after smoothing and filtering. The function of the post-amplifier is to meet the input requirements of the associated equipment.

DSP chip selection

The JK-DP10 digital anti-noise processor designed in this paper has high requirements for digital signal processor chips. The chip must have strong real-time processing performance, high computing speed and data throughput; it also requires low power consumption, and the external A/D, D/A and Flash memory are preferably integrated inside the DSP to reduce the product size. Therefore, a TMS320C5XX series DSP chip is selected as the processing chip, with external high-speed A/D, D/A and 32KB Flash for program loading.

Software Algorithm Solution

The digital anti-noise processor is implemented by an adaptive filter. The adaptive filter has the ability to track the changes of signals and noise, so that the characteristics of the filter also change with the changes of signals and noise to achieve the optimal filtering effect.

The characteristic change of the adaptive filter is achieved by the adaptive algorithm through adjusting the filter weight coefficient. Generally, the adaptive filter consists of two parts, one is the filter structure, and the other is the adaptive algorithm for adjusting the filter coefficient. The structure of the adaptive filter adopts the FIR structure. The classic LMS algorithm cannot achieve the best noise reduction effect for the processing of in-band white noise. It is also necessary to use the autocorrelation characteristics and power spectrum density characteristics of the noise, and make appropriate adjustments based on the LMS algorithm to achieve the best noise reduction effect.

The DSP implementation structure of the digital anti-noise microphone group is shown in Figure 1.

The original input signal d(n) includes signal and noise, and x(n) is the reference noise input. This adaptive filter essentially completes the noise estimation in d(n), and subtracts the estimated value y(n) from the original channel to achieve the result of noise elimination. Of course, the estimated value y(n) and the original input signal are not simply subtracted algebraically, but have a set of corresponding software algorithms, such as power spectrum analysis of related power.

In Figure 1, the adaptive filter adopts a horizontal structure, and the output y(n) of the filter is expressed as:

N- 1

y(n)= ∑ We(n- i)

i =0

N is the order of the filter.

Software Design

The complexity of an adaptive filter is usually measured by the number of multiplications and the order it requires. For an adaptive filter system based on DSP, the data throughput and data processing speed of the DSP chip are also very important. This digital anti-noise processor uses a 120-order adaptive digital filter and selects a DSP chip with a computing speed of 40MIPS as the main processor. Since the DSP chip contains A/D and D/A and 16KB flash memory, these on-chip resources make the implementation of the adaptive filter more efficient.

According to the autocorrelation characteristics and power density of noise, in addition to using the LMS algorithm in the traditional symmetrical lateral structure FIR filter, the software also estimates the power spectral density of noise and signal, that is, the squares of the 16 values of the sampling code are accumulated to find the average power value, which is compared with the power value of the previous sample point. The difference after comparison is divided by the set noise threshold value. If the result is greater than 1, the weight coefficient of the filter is adjusted to be smaller and the signal output amplitude is increased. If the result is less than or equal to 1, the weight coefficient of the filter is increased and the signal output amplitude is reduced.

Customized special anti-noise DSP chip

After the debugging work is completed, it is handed over to a company specializing in DSP chips to make a DSP chip with anti-noise function. After actual measurement, the power consumption of the whole machine is no more than 70mA, and the lead pins of the DSP chip are reduced to 64 pins, which greatly reduces the area of the printed circuit board. Since the software code is masked in the chip once, it is unnecessary to write the code every time, reducing the workload of debugging. In general, the module can be completed by debugging only 3 points, which greatly reduces the debugging cost and is conducive to mass production.

Conclusion

The digital anti-noise module uses DSP chips and adaptive technology to improve the anti-noise performance of communication products and reduce production costs. This module has been successfully used in my country's airborne communication equipment.