Decoupling and ADC interface

Let’s go back to the previous example of “Interfacing a Single Low Dropout (LDO) Regulator to an ADC Supply” and add decoupling. The size and value of the decoupling capacitors (represented by n capacitors in Figure 1) depends on several factors, such as the supply voltage, operating frequency, ADC power consumption, LDO characteristics, etc. There are many things to consider, but for the purposes of this discussion, it is assumed that appropriate decoupling capacitors have been selected. It is important to note that good design practice is to properly decouple the supply inputs to the ADC.

Figure 1. Using a single LDO to drive multiple ADC supply inputs (with proper decoupling)

In many cases, the system can provide a high voltage supply, but the ADC requires a lower supply voltage. Many ADCs today use a 1.8V supply voltage, while many systems provide a high supply voltage such as 6V or 12V (or even higher in some cases). Consider an example where the system provides a 6V supply voltage and the ADC requires a 1.8V supply input. For this discussion, the focus is on the analog supply, digital supply, and driver supply input of the ADC. The input buffer supply is often a higher voltage such as 3.3V, but it is not a high current supply input, so the step down from 6V to 3.3V can be achieved with a single LDO.

Figure 2. To ADC power supply input

Stepping down high input voltage for use with low supply voltage inputs to ADCs

Here is an example using a 14-bit, 250MSPS dual-channel AD9250. The AD9250 data sheet gives a typical total power consumption of 711mW. This ADC has three power supply inputs, analog (AVDD), digital (DVDD), and driver (DRVDD). The power consumption and junction temperature are calculated using the topology shown in Figure 1. For this example, two ADP1741 LDOs, one with a 3.3V output and one with a 1.8V output, can be used to obtain the required supply voltages, as shown in Figure 1.

First, calculate the total current consumed by the AD9250. Adding the current requirements of its three supplies gives the total current requirement of the AD9250: 255mA (IAVDD) + 140mA (IDRVDD + IDVDD) = 395mA. Let’s first consider the case where the ADP1741 generates 3.3V from a 6V supply input. In this case, the power dissipated by the ADP1741 is (6V – 3.3V) x 395mA = 1.067W. This means that the maximum junction temperature, Tj, will be equal to TA + Pd x Θja = 85oC + 1.067W x 42oC/W = 129.79oC, which is less than the maximum rated junction temperature of the ADP1741, 150oC.

This is the larger of the two voltage drops on the rails, so the second ADP1741 is not a problem, let’s do some calculations to prove it. The second ADP1741 is identical to the first, so the current requirement is also 395mA. The voltage drop across the second ADP1741 is 3.3V – 1.8V = 1.5V. Calculating the power dissipation, we get (3.3V – 1.8V) x 395mA = 0.5925W. Now calculate the maximum junction temperature: 85oC + 0.5925W x 42oC/W = 109.89oC, which is also less than the maximum rated junction temperature of the ADP1741. Assuming the ferrite beads and decoupling capacitors have been chosen correctly, this ADC has a viable power supply.