Common Problems and Solutions in High-Speed ​​PCB Design Applications

As the operating frequency of devices increases, the signal integrity and other issues faced by high-speed PCB design have become a bottleneck in traditional design, and engineers are facing increasing challenges in designing complete solutions. Although relevant high-speed simulation tools and interconnection tools can help designers solve some problems, high-speed PCB design also requires continuous accumulation of experience and in-depth exchanges within the industry.

Listed below are some of the issues that have received widespread attention.

The Impact of Wiring Topology on Signal Integrity

When signals are transmitted along transmission lines on high-speed PCB boards, signal integrity problems may occur. Tongyang, a netizen from STMicroelectronics, asked: For a set of buses (address, data, command) driving up to 4 or 5 devices (FLASH, SDRAM, etc.), when routing the PCB, does the bus reach each device in sequence, such as first connecting to SDRAM, then to FLASH... or is the bus distributed in a star shape, that is, separated from somewhere and connected to each device separately. Which of these two methods is better in terms of signal integrity?

In this regard, Li Baolong pointed out that the impact of wiring topology on signal integrity is mainly reflected in the inconsistent arrival time of signals at various nodes, and the inconsistent arrival time of reflected signals at a certain node, which causes the signal quality to deteriorate. Generally speaking, the star topology can achieve better signal quality by controlling several branches of the same length to make the signal transmission and reflection delay consistent. When using topologies, the signal topology node situation, the actual working principle and the wiring difficulty should be considered. Different buffers have different effects on signal reflection, so the star topology cannot solve the delay of the above-mentioned data address bus connecting to FLASH and SDRAM, and thus cannot ensure the signal quality; on the other hand, high-speed signals generally communicate between DSP and SDRAM, and the rate of FLASH loading is not high, so in high-speed simulation, it is only necessary to ensure the waveform at the node where the actual high-speed signal works effectively, without paying attention to the waveform at FLASH; star topology is more difficult to wire than daisy chain and other topologies, especially when a large number of data address signals use star topology.

Impact of pads on high-speed signals

In PCB , from the design point of view, a via is mainly composed of two parts: the drill hole in the middle and the pad around the drill hole. An engineer named fulonm asked the guest what effect the pad has on high-speed signals. In response, Li Baolong said: The pad has an impact on high-speed signals, and its impact is similar to the impact of the device package on the device. A detailed analysis shows that after the signal comes out of the IC, it passes through the bonding wire, pin, package shell, pad, solder to reach the transmission line. All the joints in this process will affect the quality of the signal. However, in actual analysis, it is difficult to give the specific parameters of the pad, solder and pin. Therefore, they are generally summarized by the package parameters in the IBIS model. Of course, such analysis can be accepted at lower frequencies, but it is not accurate enough for higher frequency signals and higher precision simulation. A current trend is to use IBIS's VI and VT curves to describe the Buffer characteristics and use SPICE models to describe the package parameters. How to suppress electromagnetic interference

PCB is the source of electromagnetic interference (EMI), so PCB design is directly related to the electromagnetic compatibility (EMC) of electronic products. If EMC/EMI is taken seriously in high-speed PCB design, it will help shorten the product development cycle and accelerate the time to market. Therefore, many engineers are very concerned about the problem of suppressing electromagnetic interference in this forum. For example, Shu Jian from Wuxi Xiangsheng Medical Imaging Co., Ltd. said that in the EMC test, it was found that the harmonics of the clock signal exceeded the standard seriously. Is it necessary to do special treatment on the power pins of the IC that uses the clock signal? At present, only decoupling capacitors are connected to the power pins. What other aspects should be paid attention to in PCB design to suppress electromagnetic radiation? In this regard, Li Baolong pointed out that the three elements of EMC are radiation source, propagation path and victim. The propagation path is divided into space radiation propagation and cable conduction. So to suppress harmonics, first look at its propagation path. Power decoupling is to solve the transmission of conduction mode. In addition, necessary matching and shielding are also needed.

Li Baolong also pointed out in response to the question of WHITE netizens that filtering is a good way to solve EMC radiation through conduction. In addition, it can also be considered from the aspects of interference sources and victims. Regarding interference sources, try to use an oscilloscope to check whether the signal rises too fast, whether there is reflection or overshoot, undershoot or ringing. If so, consider matching; in addition, try to avoid signals with a 50% duty cycle, because such signals have no even harmonics and more high-frequency components. Regarding victims, measures such as grounding can be considered.

Should RF routing be done by vias or by bending?

In this forum, many netizens asked questions about high-speed analog circuit design. For example, a netizen from Jingheng Electronics asked: In high-speed PCB , the pass can greatly reduce the return path, but some people say that it is better to bend it than to make a pass, so how should we choose?

In this regard, Li Baolong pointed out that the analysis of the return path of the RF circuit is not the same as the signal return in the high-speed digital circuit. The two have something in common, that is, they are both distributed parameter circuits, and both use Maxwell equations to calculate the characteristics of the circuit. However, the RF circuit is an analog circuit, and there are two variables in the circuit, voltage V=V(t) and current I=I(t), which need to be controlled, while the digital circuit only focuses on the change of signal voltage V=V(t). Therefore, in RF wiring, in addition to considering signal return, it is also necessary to consider the impact of wiring on current. That is, whether the bending wiring and vias have any effect on the signal current. In addition, most RF boards are single-sided or double-sided PCBs , and there is no complete plane layer. The return path is distributed on various grounds and power supplies around the signal. During simulation, 3D field extraction tools need to be used for analysis. At this time, the return of the bending wiring and vias needs to be specifically analyzed; high-speed digital circuit analysis generally only deals with multi-layer PCBs with complete plane layers . Using 2D field extraction analysis, only the signal return in adjacent planes is considered, and the via is only treated as a lumped parameter RLC.