How to overcome the huge challenges brought by SoC design in the 5G era?
Latest update time：2021-09-02 22:04
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At present, the wave of artificial intelligence is sweeping the world, and the 5G era is coming. The real society and the Internet space are merging faster, and humans, machines and things are entering a new era of wisdom where everything is connected, virtual and real are combined, and open and shared.
To achieve the interconnection of all things, ubiquitous sensors, smart terminals and other devices are required to continuously collect data, and data transmission is required through ubiquitous infrastructure such as the Internet of Things and the Internet. Faster network speeds are necessary, and the required traffic will increase dozens of times.
The arrival of 5G has fundamentally overturned the concept of "communication". 5G technology expands the objects of communication from people to all things, realizing the interconnection of all things anytime and anywhere, allowing humans to dare to expect to participate in it synchronously with all things on the earth through live broadcast without time difference.
The arrival of the 5G era
5G is the fifth generation of mobile communication technology, with fiber-like access speed, "zero" latency experience, connection capacity of hundreds of billions of devices, ultra-high traffic density, ultra-high connection density and ultra-high mobility, more than 100 times energy efficiency improvement and more than 100 times bit cost reduction. Compared with 4G, 5G has achieved a leap from qualitative change to quantitative change, opening a new era of extensive interconnection of all things and deep interaction between people and machines, and becoming the driving force of a new round of scientific and technological revolution and industrial transformation. 5G communication is backward compatible with 4G\3G\2G.
5G has a wealth of applications and trends. Among them, there are three trends with the greatest potential: enhanced mobile broadband (eMBB), ultra-reliable low-latency communications (URLLC), and massive machine-type communications (mMTC).
▲Growth of the three major 5G pillars
Essentially, eMBB provides better mobile data connectivity. This includes using fixed wireless access to compete with traditional fixed broadband (as discussed in Market Trends). URLLC will be key for industrial and medical applications, where superior network performance can save costs and save lives. And mMTC enables applications such as smart grids and smart cities. These applications require excellent coverage and a large number of connections, and have the potential to change the way we live.
Huawei predicts that 5G will provide services to 58% of the world's population by 2025, and China will become the world's largest 5G market. 5G and its governing body 3GPP have high expectations for extending 5G capabilities beyond the mobile market.
5G greatly improves the speed of mobile phones in terms of streaming video, social media, etc. 5G also opens the way to enter many new areas. These include low-power Internet of Things (IoT) applications such as asset tracking, automatic connection of cars to infrastructure, broadband Internet service, cable TV service, etc.
It can be said that 5G is ready to go, and is rapidly "shooting" into all walks of life, prompting more and more devices to be connected. The first to receive the east wind are 5G application industries with a certain development foundation, such as mobile phones, the Internet of Things, and automobiles. IDC predicts that the number of 5G device connections will increase from 10 million in 2019 to 1.01 billion in 2023, with a compound annual growth rate of 217.2% from 2019 to 2023.
Changes in chip design
On this basis, as a core component, the demand for chips is increasing significantly. According to Statista data, the global 5G chip market size was US$1.03 billion in 2019. It is expected that the market size will reach US$14.53 billion by 2025, with a compound annual growth rate of more than 55% from 2019 to 2025.
5G chips can be divided into three categories:
AP chips (application processors), baseband chips, and RF chips. The most difficult and important of these are baseband chips, which require more technical accumulation as the standards from 2G to 5G are upgraded and compatible.
The research and development of 5G chips began before 2016. NASA first proposed the concept of 5G in 2008. In 2014, the Next Generation Mobile Network Alliance (NGMN), composed of major global operators, announced the launch of a global project for 5G. Companies represented by Qualcomm, MediaTek, and Huawei have deployed early research on 5G chips.
From 2016 to 2018, 5G chips gradually entered the trial stage. In October 2016, Qualcomm released the X50 5G baseband chip. In 2018, Huawei, MediaTek, Samsung, and Intel respectively released 5G chips that support NSA/SA networking.
From 2019 to 2020, 5G chips entered the commercial development stage. With the determination of 5G standards, the 5G baseband technology of various manufacturers continued to mature, and the second-generation 5G baseband began to emerge.
According to relevant media analysis, 5G chips will enter a comprehensive development stage starting from 2021. With the deepening development of 5G commercialization, 5G chips will be widely used in telecommunications base station equipment, smartphones/tablets, Internet cars, Internet devices and broadband access gateway equipment, and the industry will enter a comprehensive development stage.
5G’s Impact on SoC
In the years of development, the design of 5G chips has also undergone many changes. These changes are precisely to cope with the new problems derived from the arrival of 5G.
The first is bandwidth. Since this is a system challenge, not just a wireless technology challenge, SoC design bandwidth throughout the device is very important. High-bandwidth, standards-based IP is a critical part of 5G SoC system design.
Secondly, in terms of latency, taking the need to reduce latency as an example, the current 5G specification expects a round-trip latency of less than 1ms. The future 6G plan launched in the fall of 2019 expects a round-trip latency of 10 microseconds. Although this may be several orders of magnitude higher than the latency of some memory access operations in the SoC, at such low latency, every clock cycle in the SoC design is more important.
Finally, power consumption, in order to expand the ability of mobile providers to provide services for the Internet of Things, low-power protocols have been introduced, such as LTE-M and NB-IoT. These protocols require new processing solutions, new wireless solutions, and low-power system design methods and IP capabilities, including operation near threshold voltage, voltage and frequency scaling, and intelligent clock gating.
In this regard, Synopsys' DesignWare IP portfolio provides reliable solutions for high-speed analog front ends (AFEs), as well as proven interface IP, security IP, and efficient processing capabilities to meet the needs of the most advanced 5G chipset designs.
To meet these demands, these SoCs must accommodate application processors with higher bandwidth and complex communication capabilities. These application processors can be used in mobile phones, AR/VR headsets, drones, cameras, tablets, all-in-one computers, and many other consumer devices. In addition to consumer devices, the infrastructure must also be able to meet the high-density requirements of these consumer devices and forward the incoming data to the appropriate destination. This may be another network, local device, cloud data center, or local data center. For these applications, edge computing will be a basic trend to support future distributed computing. All of these trends require upgraded SoCs to meet 5G coverage requirements.
Chip designers are integrating new innovative IP for processors, interfaces, simulation and security, etc. In addition, 5G applications extending to the Internet of Things require sensors, memory and chip-to-chip interfaces, processing power, and low-power wireless IP solutions that provide low latency with high reliability.
Synopsys' ARC EM9D processor provides a well-defined DSP instruction set, XY memory with advanced address generation, and optional custom extended instruction set, enabling efficient implementation of NB-IoT or any other communication protocol. The complexity of 5G chip design requires additional expertise and resources for chip developers. Therefore, designers rely more than ever on the DesignWare IP portfolio of interface IP, focusing key internal resources to enable them to focus on product differentiation and meet the needs of 5G.
In addition to standards-based single controller and PHY interface IP, Synopsys also offers configurable, pre-verified DesignWare Interface IP subsystems that provide complete, complex functionality and are ready to be integrated into SoCs "as is" or customized by design teams.
5G in-depth application scenarios
Specific to the application field, 5G will also put forward different requirements for different application scenarios.
First up is the mobile processor. The goal of 5G is to deliver speeds that compete with current wired home broadband solutions. To do this, 3GPP has updated several specifications that focus on upgrades such as higher bandwidth, more channel aggregation, and massive antenna arrays. To accommodate this high throughput, SoC designs must integrate multiple elements, including complex baseband processing, high-speed analog IP, and interface IP that supports the latest high-speed standards as well as security.
▲
Global cellular IoT communication deployment
This reality has significantly increased the complexity of baseband, infrastructure, and application processor technologies, creating a need for new innovative IP to address this complexity. Synopsys' DesignWare® IP portfolio provides reliable solutions, from high-speed analog front ends to proven interface IP in advanced FinFET technologies and process solutions, to meet the needs of the most advanced 5G chipset designs.
In terms of 5G IoT, in order to expand mobile wireless technology to more devices, 3GPP has defined lower bandwidth, simplified communication protocols such as NB-IoT and LTE-M to meet the low power and low cost requirements of IoT. Low-power baseband processing is critical for wireless IoT applications. Given the complexity of 5G, when using baseband modems, more and more design teams choose to develop programmable and task-optimized cores/accelerators because these cores/accelerators have ultra-low power consumption and size, provide high computing throughput, and can meet the exact requirements of the device.
Synopsys offers a comprehensive IP portfolio that addresses the specific requirements of IoT SoC designs, including silicon-proven wired and wireless IP, data converters, security IP, low-power embedded memories and logic libraries, energy-efficient processor cores, and integrated IP subsystems.
In terms of 5G automotive (V2X), 5G will support extremely low latency capabilities, enabling feedback system delays of less than 1ms for controls. This requires innovative IP solutions. Automotive SoCs are a key driver of the low latency requirements defined by 3GPP. However, automotive solutions require high quality, high reliability, and security, and must be verified from the beginning, making IP a key path to success.
Synopsys' quality and reliability standards give automotive SoC designers confidence when developing complex SoCs at mainstream and advanced process nodes using the latest interface IP,
processor IP
, embedded memories, and logic libraries. The ISO 9001-certified DesignWare IP quality management system implements applicable clauses of the IATF 16949 standard to support additional stringent automotive quality requirements.
Summarize
5G is often viewed as a collection of state-of-the-art technologies, such as increasing system bandwidth, reducing SoC latency, and significantly reducing power consumption for the IoT, which brings many challenges to the design of next-generation SoCs.
To bring 5G to market, it is essential to use standard-based trusted IP and proven processing and analog IP at the most important process technology nodes. In this regard, Synopsys provides the most comprehensive IP portfolio for 5G implementation, making 5G chip design easier.
Click "Read original text" at the end of the article to view Synopsys' original 5G white paper
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