In the past two days, the University of Chinese Academy of Sciences (abbreviated as "UCAS") received a special graduation gift.
Five undergraduate students from the class of 2016 at the University of Science and Technology of China led the development of a 64-bit RISC-V processor SoC chip called "NutShell," which has the same pronunciation as "Guoke," and was taped out in four months based on SMIC's 110nm process.
This chip can successfully run the Linux operating system and UCAS-Core, the teaching operating system of USTC written by students themselves.
As soon as this news came out, it immediately attracted widespread attention from society.
You know, processor chips are recognized as the crown jewel of the chip industry. They are highly complex and difficult to design, and processor chip design talent is extremely scarce in my country.
During their undergraduate graduation project, undergraduate students from the University of Science and Technology of China were able to complete the design of a processor chip in 9 months. This is an extremely meaningful attempt in my country's undergraduate education - it is not only the best test of what students have learned in their undergraduate studies, but also encourages and stimulates students' interest in chip research.
This is not the first time that USTC has "out-of-the-box" in chip education. Last year, USTC embedded the "Loongson III" chip in its undergraduate admission notice, which is still fresh in people's memory. This year, five USTC graduates have received "super-hardcore graduation certificates."
Of course, behind the "Guoker" chip there are not only five undergraduates, but also a strong team of mentors and strong support from the University of Science and Technology of China for chip talent training.
These five undergraduates and their chip achievements are actually the "guinea pigs" of USTC's "One Chip for Life" program.
Strong mentor lineup: more than ten experts team up to provide guidance
On November 8, 2018, during the Wuzhen Internet Conference, the China Open Instruction System (RISC-V) Alliance was officially established.
Against the backdrop of ongoing trade disputes between China and the United States, it has become an urgent task to have the ability to independently develop processor chips.
Currently, the two major chip instruction sets are x86 and Arm. x86 dominates the PC/server market, while Arm dominates the terminal equipment field such as smartphones. However, both instruction sets are owned by overseas companies. Once they are banned, my country's processor chip research and development will face tremendous pressure.
Fortunately, alternative options have emerged in recent years. The University of California, Berkeley established the non-profit organization RISC-V Foundation in 2015, made its new instruction set RISC-V completely open source, and actively aggregated global innovation forces to jointly build the RISC-V ecosystem.
Against this background, Bao Yungang, a researcher at the Institute of Computing Technology of the Chinese Academy of Sciences and a professor at the University of Chinese Academy of Sciences, began to think about a question: Can students be involved in the construction of an open source chip ecosystem?
This became the initial germ of the "One Chip for Life" plan.
▲Researcher Bao Yungang shows students’ achievements
The goal of the "One Chip for Life" program is to cultivate processor chip design talents with solid theoretical and practical experience by allowing undergraduates to design processor chips and complete tape-out.
In 2017, Bao Yungang arranged for students to count the first authors of papers in ISCA, the top architecture conference from 2008 to 2017, and found that 85% chose to work in the United States, and only 4% worked in China. This is closely related to the fact that many domestic universities do not carry out teaching and research related to processor chip design.
The United States has also experienced a similar talent crisis. In 1982, among thousands of universities across the country, there were less than 100 professors and students engaged in semiconductor-related research.
In response to this, the U.S. Department of Defense Advanced Research Projects Agency (DARPA) launched the MOSIS project to provide wafer production services to universities. Over the past 30 years, it has produced more than 60,000 chips for universities and research institutions and trained tens of thousands of students.
These data show that the plan to accelerate chip talent training can no longer be delayed. Bao Yungang contacted several undergraduate students of the University of Science and Technology of China and asked them if they were willing to participate in this "One Life, One Chip" plan as guinea pigs, and these students readily agreed.
On June 20, the “One Chip for Life” plan was launched.
This was not a product-level chip development, but a teaching practice. Soon, Teacher Tang Dan gave the future chip an internal code name "COOSCA". As the project progressed, the teaching team also continued to expand:
Teacher Tang Dan and engineer Liu Tong were responsible for SoC architecture design guidance, doctoral student Yu Zihao was responsible for processor core design, teacher Zhang Ke was responsible for project coordination and docking with the University of Science and Technology of China, and together with teachers Chang Yisong and Zhao Ran, provided guidance on FPGA simulation, teacher Jie Biwei and engineer Li Yi provided support in back-end physical design, and teacher Cai Ye from Shenzhen University helped design PCB boards, and teachers Jiang Dejun and Wang San were undergraduate operating system teachers at the University of Science and Technology of China, providing support in operating systems, and two doctoral students Wang Huizhe and Xu Yinan also served as teaching assistants to help answer questions. Bao Yungang said that he was more like a cheerleader, cheering everyone up.
The teaching team then took action to discuss and formulate an overall plan, determine the technical route, select the basic platform, build the development environment, select the wafer production process and shuttle bus...
The students who participated in the first phase of the "One Chip for Life" program were Jin Yue, Wang Huaqiang, Wang Kaifan, Zhang Linjun and Zhang Zifei. They passed the interview for the Institute of Computing Technology's summer camp and were all admitted as graduate students of the Institute of Computing Technology, Chinese Academy of Sciences.
Among them, Jin Yue’s supervisor is Researcher Chen Mingyu, Wang Huaqiang’s supervisor is Associate Researcher Jiang Dejun, Wang Kaifan’s supervisor is Academician Sun Ninghui, and Zhang Linjun and Zhang Zifei’s supervisor is Bao Yungang.
After the processor R&D team was formed, on August 20, teachers Tang Dan and Jie Biwei finally secured the tape-out channel for SMIC's 110nm process, and the "One Chip for a Lifetime" plan was ready.
On August 27, a mobilization meeting for the “One Chip for Life” program was held to formulate a technical route based on the development of teaching processors.
4 months of intensive development and emergency testing during the epidemic
Teacher Tang Dan determined that the most suitable date for tape-out was December 17, less than four months before the mobilization meeting. In response, the team quickly developed an overall plan and made two decisions:
One is developed using Chisel, and the other is improved based on a teaching RISC-V processor core developed by Yu Zihao for NTU.
"This is a development model that is close to actual combat. In actual product development and scientific research work, we often don't always start from scratch. More often, we add new functions and improve performance based on the existing ones. This requires cultivating students' ability to "understand-digest-innovate," said Bao Yungang.
All parties of the University of Chinese Academy of Sciences have given great support. From the school leaders to the undergraduate department and the School of Computer Science, all levels have shown great concern and attention. At the Institute of Computing Technology of the Chinese Academy of Sciences, Director Academician Sun Ninghui, Deputy Director Chen Xilin who is in charge of teaching, and Teacher Li Lin from the Education Department have all provided all-round guarantees and support.
This also gave the "One Life, One Chip" team a sense of mission. After four months of intensive development, under the technical guidance of the teaching team, the students constantly summarized the experience of failed explorations, deeply analyzed the reasons why the current solution was not feasible, optimized the design solution, and then on December 19, the layout of the 64-bit RISC-V processor SoC chip COOSCA 1.0 was frozen and the layout was officially submitted for tape-out.
A month later, the COVID-19 pandemic broke out, and the research team began to worry more - could the chip be taped out as scheduled? Could they make it to the graduation defense?
Fortunately, it was a false alarm and the COOSCA chip returned on time on April 23.
Since the students were unable to return to school to carry out on-site debugging and testing, Yu Zihao, Cai Ye and Liu Tong stepped forward to assist in the debugging and testing work.
After about a month of debugging and testing, the chip was able to start the Linux operating system, but a bug was found in the chip's I/O module, which affected the reading and writing of the SD card. The problem was solved through frequency debugging.
On June 2, the undergraduate graduation project defense day of USTC, five students introduced their further optimization work based on COOSCA processor core:
Wang Huaqiang: Design of out-of-order multi-issue processor based on RISC-V
Zhang Zifei: Design of Vector Processing Unit Based on RISC-V
Zhang Linjun: Design and Performance Optimization of Branch Predictors for Open Source Processors
Jin Yue: Design and implementation of non-blocking cache for open source processors based on agile development language
Kaifan Wang: Binary Translation and Optimization under RISC-V Platform
Among them, the COOSCA kernel was used in Wang Kaifan’s graduation project, which was also the first time that the kernel designed by themselves was used in scientific research.
Wang Huaqiang demonstrated the functions of the COOSCA chip on behalf of the "One Life One Chip" team. He further improved the core to out-of-order multi-issue and tested it on FPGA. The results showed that the IPC of the COOSCA core was doubled. His graduation project also won the Excellent Graduation Project Award at the University of Science and Technology of China.
Later, Wang Kaifan ported UCAS-Core, which was written by students in the operating system course of USTC, to the COOSCA core, thus achieving the small goal of running an operating system written by themselves on a CPU written by themselves.
"Fruit Shell" chip unveiled
On July 18, the CRVA Alliance held a mid-year technical seminar on RISC-V. The "One Chip for One Life" team decided to have Wang Huaqiang submit a design report to formally introduce the design of the COOSCA core to the community and renamed the chip "NutShell", which is homophonic with "Guoke".
Wang Huaqiang was the second speaker at the technical seminar, introducing the design details of Guoke and some experiences during the development process.
Researcher Bao Yungang revealed that the design source code of "Guokr" has been open sourced to the international community.
"NutShell" open source link:
https://github.com/OSCPU/NutShell
On July 22, the team received new good news.
Wang Huaqiang received the notification that "Guokr" was accepted by RISC-V Global Forum. He will represent the team to introduce the design of "Guokr" to the global industry on September 3. This is also the first time that "Guokr" will appear on the international stage.
Most of the reports at the RISC-V Global Forum came from senior experts in the industry around the world, including Professor David Patterson, a master of computer architecture and Turing Award winner. It is also rare in the world that undergraduate students from the University of Science and Technology of China can appear at the RISC-V Global Forum to introduce the processor core they designed.
Today, these five students are participating in a more challenging project, developing the design of a high-performance out-of-order multi-issue RISC-V processor core.
They, who had some difficulties in making the "Guoker" chips a year ago, have now become the backbone of the new team.
Excluding Cai Ye, Tang Dan and Bao Yungang, three middle-aged people over 40 years old in the team, the average age of this team is only 23.1 years old, but the combat effectiveness is amazing - in less than three weeks, they completed the design and implementation of the mainstream pipeline of the out-of-order processor from scratch and passed the CoreMark test.
"I am full of expectations for the future of this group of young people." Bao Yungang believes that by the time they are 30, they will be considered "veterans" in the field of processor chip and computer system design. "At that time, they will enter their respective jobs, perhaps developing products in the industrial sector, or doing scientific research in the academic sector. I believe that their creativity will be further exerted and demonstrated."
The “One Chip for Life” program is also continuing to advance.
According to Academician Sun Ninghui, director of the Institute of Computing Technology of the Chinese Academy of Sciences, the vision and goal of the "One Chip for Life" program is to radiate across the country based on the practical experience of the University of Chinese Academy of Sciences, help more universities form practical courses from processor chip design to tape-out and running operating systems, increase the scale of talent training for processor chip design in my country, and shorten the cycle from the training stage to the front line of scientific research and industry.
Academician Sun Ninghui said that the
"
One Chip for a Lifetime
"
program aims to
train
500
students
every year in the country in
three
years,
1,000
students
every year in
five
years
, and
10,000
students
every year in
ten
years.
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