Cadence and TSMC collaborate to accelerate the development of mobile, artificial intelligence and ultra-large-scale computing applications based on N3 and N4 processes
Customers from both parties have used certified Cadence digital processes and customized/simulation tool suites to successfully tape out test chips on TSMC's advanced processes.
This suite of digital and custom tools supports Cadence's Intelligent System Design ™ (Intelligent System Design ™ ) strategy, which is designed to help customers achieve superior system-on-chip design.
To learn more about Cadence's digital and custom advanced process node solutions, visit www.cadence.com/go/advndn34.com.
Digital process certification for N3 and N4 processes
Cadence digital process tools are finely optimized for the TSMC N3 process and have now been certified to provide customers with better power, performance and cost (PPA) and shorten product time to market.
The complete RTL-GDS process includes the Innovus ™ Implementation System design implementation system, Liberate ™ Characterization Solution parameter characterization solution, Quantus ™ Extraction Solution extraction solution, Tempus ™ Timing Signoff Solution timing signoff solution and ECO Option, and for Voltus ™ IC Power Integrity Solution for electromigration and IR drop analysis . In addition, Genus Synthesis Solution and its predictive iSpatial technology also support this process.
The Cadence tool suite enables customers to successfully design mobile, artificial intelligence and hyperscale computing applications, providing multiple powerful features, including: advanced rules support from synthesis to signoff ECO, mixed-height cell rows with full-flow support; including multiple heights Large library of , voltage threshold (VT ) and drive strength cells; ultra-low voltage cell characterization and timing analysis accuracy.
N3 and N4 process
Custom/Simulation Tool Suite Certification
TSMC and Cadence have been continuously collaborating to optimize customized IC design methodologies and meet complex simulation requirements in Cadence's Virtuoso ® and Specter ® environments to improve the overall efficiency of design engineers.
In this collaboration, Cadence also provides an enhanced customized IC design reference flow (CDRF), and the Virtuoso Design Platform design platform and Specter Simulation Platform simulation platform have obtained TSMC N3 and N4 process certification. In addition, the Virtuoso platform is tightly integrated with the Innovus Implementation System design and implementation system, providing an integrated unified design environment for customers using TSMC's advanced processes for mixed-signal design.
Customized IC design flow for TSMC N3 and N4 processes, with enhancements including an enhanced N3 schematic design migration flow and advanced coloring support for N3 and N4 processes.
About Cadence
With more than 30 years of expertise in computing software, Cadence is a key leader in the electronic design industry. Based on the company's intelligent system design strategy, Cadence is committed to providing software, hardware and IP products to help electronic design concepts become reality. Cadence's customers are the most innovative companies around the world, delivering everything from chips and circuit boards to the most dynamic application markets such as consumer electronics, hyperscale computing, 5G communications, automotive, mobile, aerospace, industrial and medical. Systematic excellence in electronics. Cadence has been ranked among Fortune magazine's 100 Best Companies to Work For for seven consecutive years. For more information, please visit the company's website at cadence.com.
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