In-Depth丨The overt and covert struggles in the advanced manufacturing processes of major manufacturers
·Focus: Artificial intelligence, chip and other industries
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Since the adoption of 10,000 nanometer process technology in 1971, competition in process technology in the chip manufacturing field has never stopped.
With the advancement of science and technology, the manufacturing process continues to shrink, starting from 5 nanometers and developing to 3 nanometers and 2 nanometers. Now, the manufacturing of 2-nanometer chips has entered a stage of comprehensive competition.
In November 2021, MediaTek officially released the high-end mobile phone SoC chip Dimensity 9000, which uses TSMC's 4-nanometer process technology. This is also the world's first mass-produced 4-nanometer process chip.
TSMC’s 4nm process belongs to the same platform as 5nm. The biggest advantage lies in the design rules, SPICE and IP that are compatible with 5nm.
TSMC stated a year ago that it would mass-produce 3-nanometer chips in the second half of 2022. However, the high cost of the new technology forced Apple to abandon the initial version of 3-nanometer.
Recently, the iPhone 15 and iPhone 15 Pro series were officially unveiled, and the core chip A17 Pro has become one of the highlights this year.
The A17 Pro is manufactured using TSMC’s latest 3-nanometer process (N3), with a transistor count of 19 billion. This is the first time that TSMC’s 3-nanometer process has been used on a top-notch chip.
At this stage, Apple is the first customer of TSMC’s new 3-nanometer manufacturing process. Judging from the cooperation model between the two parties, Apple is willing to pay for TSMC’s new process manufacturing costs.
TSMC will use the fees paid by Apple to further optimize its processes in order to continue to provide Apple with high-quality products with higher yield rates.
In 2019, TSMC took the lead in starting the research and development of 2-nanometer process technology. The corresponding technology development center and wafer fab are mainly located in Hsinchu, Taiwan, China. It also plans four ultra-large wafer fabs.
TSMC is expected to enter the trial production stage of the 2nm process in 2024 and mass production a year later.
Recently, some media have revealed that TSMC will start the development of 1.4nm chip process technology, and it has converted its 3nm process R&D team into a 1.4nm process R&D team.
As early as 2019, Samsung set the goal of surpassing TSMC in the next 10 years.
Samsung's wafer foundry business will mass-produce the first-generation 4-nanometer process in 2021. Starting in 2022, Samsung Electronics' 4-nanometer process yield will be on track.
Samsung's 4-nanometer process is mainly divided into 4LPE and 4LPP, and 4LPE is regarded as an evolved version of the 7LPP process.
4LPP is a low-power version of 4 nanometers that will be mass-produced in 2022. This is also Samsung’s last process node using FinFET transistor architecture.
At the beginning of 2020, Samsung started large-scale production of its newly built V1 wafer factory, becoming the first pure EUV production line in the industry to fully use 6LPP and 7LPP manufacturing processes, and the factory is also the main position of Samsung's 3-nanometer process.
In the first half of 2022, Samsung will mass-produce 3-nanometer process chips, but users and output are very limited, and no processor manufacturers have adopted it.
Samsung regards the 2nm process as the key to surpassing TSMC and returning to the leading advanced process position.
One of the reasons is that Samsung has accumulated a lot of GAA technology to implement 2-nanometer chips.
Samsung has already adopted this technology in its 3nm process. In contrast, TSMC’s move to GAA is relatively conservative.
Recently, Samsung Electronics stated that it will start producing 1.4nm process chips in 2027.
TSMC and Samsung compete in advanced process technology mainly around four core technologies: transistor structure, new materials, new lithography equipment and advanced packaging technology.
In terms of transistor structure, TSMC and Samsung use GAA technology and VTFET technology respectively.
In terms of new materials, TSMC is researching WuS2 and carbon nanotubes, and Samsung is developing a-BN materials .
In terms of lithography equipment, TSMC plans to use ASML's high numerical aperture extreme ultraviolet lithography machine to produce 2-nanometer chips, and Samsung has also acquired multiple EUV lithography machines.
Finally, both TSMC and Samsung have made achievements in the field of advanced packaging. TSMC has launched CoWoS, SOIC 3D and other technologies and integrated them into 3D Fabric. Samsung has also developed 3D packaging technology.
Faced with such a [spending money] deal, Samsung and TSMC also demonstrated their strong financial strength.
Data from IC insights show that the total capital expenditures of the semiconductor industry in 2021 will be US$152 billion, and the combined capital expenditures of Samsung Electronics and TSMC will exceed US$60 billion, accounting for nearly 40% of the total capital expenditures.
In addition to these two manufacturers that have always occupied the top position in advanced processes, Intel is also eager to try in the 2nm battlefield.
Intel has joined hands with ARM to develop a process that is comparable to TSMC and Samsung's 2-nanometer process.
At present, the development of Intel 18A (1.8 nanometer) and Intel 20A (2 nanometer) manufacturing processes has been completed, and mass production is planned for 2024.
If the R&D progress of TSMC and Samsung falls short of expectations and Intel's progress is normal, then it is not impossible to achieve the expectation of overtaking and seizing the lead in 2nm technology.
Intel officials predict that by 2025, they will use 18A process technology to catch up with and even surpass TSMC and Samsung's leading positions in cutting-edge process technology.
Currently, a large customer has paid Intel a large upfront payment to use this process technology.
Intel predicts that the company will continue to use TSMC process technology extensively in the next two years to produce the most advanced processor products.
At the same time, Intel expects to invest more than $15 billion in the next two years to use TSMC's process technology.
Intel and Samsung are working together to develop next-generation memory and processor stacking products.
This technology will stack DRAM directly on the CPU, thereby significantly improving system integration and performance.
Its goal is very clear, trying to form a three-legged alliance with TSMC and Samsung in the chip foundry industry and occupy a place in the advanced process chip market.
According to DIGITIMES data evaluation, the cost of building a 28nm process plant is US$6 billion.
However, by the 7-nanometer process, the cost of building a factory has increased to more than 12 billion US dollars; by the 5-nanometer process, this number has increased to 16 billion US dollars.
For advanced chip manufacturing technology, the helpless reality is that manufacturers need to use products with advanced process chips as a selling point to stimulate the sluggish end consumer market.
But currently, a single wafer costs tens of thousands of dollars. A slight decrease in yield will sharply increase costs, so the industry's pursuit of yield has become more urgent.
The yield rate determines the cost of the chip, and the speed of cost decline determines the speed of chip replacement, which is the rhythm of Moore's Law.
From a longer-term perspective, there will be more extreme advanced processes after 2 nanometers. The 1-nanometer process and the 0.2-nanometer process will further approach the physical limit.
In addition, the research and development of 1.4 nanometer process and even the research and development of more advanced process technology below 1.4 nanometer have also appeared in the planning.
Regarding competitors, on the one hand, it is Intel's transformation, on the other hand, Samsung is working hard to improve its yield rate, and TSMC is working hard to expand production to meet the needs of global customers.
The tug-of-war between the giants in their advanced processes will not end at 2 nanometers. The giants are coming and going, constantly exploring the limits of Moore's Law in the tug-of-war at each node.
Reference for some information: Semiconductor Industry Observation: "Major Manufacturers Competing for Advanced Processes", Tencent Technology: "TSMC and Apple [Betting] on 3-nanometer Chips, and Samsung Decisive [Life and Death]", Electronic Enthusiast Network: "TSMC Sprints on 2-nanometer Capacity Production, 2 nanometer advanced process decisive battle in 2025", adjacent chapter: "Where will the advanced process technology enter the awkward period? ", China Electronics News: "Samsung and TSMC launch tug-of-war on advanced manufacturing processes"
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