Designed for time division duplex systems, the best of both worlds RF front-end series

Doing so means:

• The more channels there are, the higher the RF power inside and outside the base station will be, which will exacerbate the problem of isolation between non-interfering channels.

• To maintain reliability with high-power signals, receiver front-end components must improve dynamic range performance.

• The size of the solution is very important.

• As the power of electronic devices and transmitters continues to increase, thermal management issues must be addressed.

In the quest for higher data rates to support a variety of wireless services and different transmission schemes, system designers are faced with more complex circuits while having to meet similar size, power, and cost budgets. Adding more transmit and receive channels in a base station tower can achieve higher throughput, but implementing each channel at higher RF power levels is just as important as keeping system complexity and cost at acceptable levels. To achieve higher RF power, hardware designers do not have many options in RF front-end design and rely on traditional solutions that require high bias power and complex peripheral circuits to achieve, making it more difficult to achieve design goals.

Analog Devices introduces multi-chip modules for time division duplex (TDD) systems that integrate low noise amplifiers (LNAs) and high power switches. The ADRF5545A/ADRF5547/ADRF5549 series covers the 1.8 GHz to 5.3 GHz cellular bands and is optimized for M-MIMO antenna interfaces. This new series of devices integrates high power switches in silicon and high performance low noise amplifiers in GaAs, combining high RF power handling capabilities with high integration without sacrificing either – the best of both worlds.

The ADRF5545A/ADRF5547/ADRF5549 application block diagram for M-MIMO RF front-end design is shown in Figure 1. The device integrates high power switches and two-stage LNAs in the channel. During the transceiver operation in receive mode, the switch routes the input signal to the LNA input. During transmit mode, the input is routed to a 50 Ω termination to ensure proper matching with the antenna interface and isolate the LNA from any reflected power from the antenna. The integrated dual-channel architecture allows designers to easily expand MIMO beyond the limitations of the traditional device 8×8 (8 transmitters × 8 receivers) configuration to 16×16, 32×32, 64×64, and even higher.

The gain characteristics of the ADRF5545A/ADRF5547/ADRF5549 and their frequency coverage are shown in Figure 2. Each device is optimized for commonly used cellular frequency bands and is consistent with other tuned components (such as power amplifiers and filters) used in the same design.

The device contains a high-power switch designed in silicon that does not require any external components for bias generation. The switch operates from a single 5 V supply, consumes only 10 mA, and can be directly connected to a standard digital microcontroller without the need for any negative voltage or level shifters. The silicon switch can save users approximately 80% of bias power and 90% of board space compared to an implementation based on a PIN diode switch.

The switch can handle a 10 W average RF signal with a 9 dB peak-to-average ratio (PAR) in continuous operation and can withstand twice the rated power in fault conditions. The ADRF5545A/ADRF5547/ADRF5549 are the first products on the market with 10 W power handling capability, making them particularly suitable for high power M-MIMO designs. If each antenna element can transmit more power, the number of transmission channels can be reduced and the same RF power can be obtained from the base station. The ADRF5545A/ADRF5547/ADRF5549 architecture is shown in Figure 3, which shows that the high power switches of both channels are powered and controlled by the same device pin. The LNA has its own power supply and control signal design.

The two-stage LNA is designed in a GaAs process and operates from a single 5 V supply, eliminating the need for any external bias inductors. The gain is flat over frequency and can be programmed up to 32 dB in high-gain mode and 16 dB in low-gain mode. The device also features a low power mode to save bias power, where the LNA can be powered down during transmit operation. The device has a noise figure of 1.45 dB (including the insertion loss of the switch), making it ideal for high-power and low-power M-MIMO systems. Figure 4 shows the noise figure performance of the ADRF5545A/ADRF5547/ADRF5549 over the specified frequency band.

The device does not require any tuning or matching components except for the primary decoupling capacitors on the power pins and the DC blocking capacitors on the RF signal pins. The RF input and output are matched at 50Ω. Matching and bias inductors are integrated into the LNA design. This reduces the bill of materials cost of expensive components such as inductors and also simplifies the hardware design of inter-channel crosstalk between adjacent transceivers. The device is available in a 6 mm × 6 mm surface-mount package with a thermally enhanced baseplate. The device is rated for operation over the -40°C to +105°C case temperature range. All three chips have the same package and use the same pinout configuration. They can be used interchangeably on the same circuit board. Figure 5 shows how the device is mounted on its evaluation board. The evaluation board can be obtained directly from ADI or through its distributors.