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As a switching power supply engineer, you will often encounter the problem that the MOSFET on the power supply board cannot work properly. First, you need to correctly test to determine whether the MOSFET has failed. Then the key is to find the cause behind the failure and avoid making the same mistake again. This article summarizes several common causes of MOSFET failure and specific measures to avoid failure. ![]() Use a multimeter to simply check whether the MOS tube is intact It is more convenient to use a pointer multimeter to test the quality of MOS. When testing, select the Ohm R×10K range. At this time, the voltage can reach 10.5V. The red pen is a negative potential and the black pen is a positive potential. Test steps: The detection of MOS tubes is mainly to determine whether the MOS tubes are leaking, short-circuited, open-circuited, and amplified. The steps are as follows: 1) Connect the red pen to the source S of the MOS and the black pen to the drain of the MOS tube. The needle indication of a good meter should be infinity. If there is a resistance value that has not been measured, the MOS tube has leakage; 2) Use a 100KΩ-200KΩ resistor to connect the gate and source, then connect the red pen to the source S of the MOS, and the black pen to the drain of the MOS tube. At this time, the value indicated by the needle is generally 0. At this time, the lower charge charges the gate of the MOS tube through this resistor, generating a gate electric field. Due to the generation of the electric field, the conductive channel causes the drain and source to be turned on, so the multimeter pointer deflects. The larger the deflection angle, the better the discharge performance; 3) Remove the resistor connecting the gate and source, and keep the red and black pens of the multimeter unchanged. If the needle gradually returns to high resistance or infinity after removing the resistor, the MOS tube is leaking. If it does not change, it is intact. 4) Then use a wire to connect the gate and source of the MOS tube. If the needle returns to infinity immediately, the MOS is intact. : ![]() The following six reasons for MOS failure are summarized as follows: 1) Avalanche failure (voltage failure), which is what we often call the BVdss voltage between the drain and source exceeding the rated voltage of the MOSFET, and exceeding it to a certain capacity, thus causing the MOSFET to fail; 2) SOA failure (current failure), which is caused by exceeding the safe operating area of the MOSFET, and is divided into failure caused by Id exceeding the device specifications and failure caused by Id being too large, and the loss being too high due to long-term heat accumulation of the device; 3) Body diode failure: In topologies such as bridge and LLC that use body diodes for freewheeling, failures are caused by damage to the body diodes. 4) Resonance failure: In the process of parallel use, failures are caused by oscillations caused by parasitic parameters of the gate and circuit. 5) Electrostatic failure: In the autumn and winter seasons, device failures are caused by static electricity from the human body and equipment. 6) Gate voltage failure: The gate oxide layer fails due to abnormal voltage spikes on the gate. 01 Avalanche failure analysis (voltage failure) [font=-apple-system-font, BlinkMacSystemFont,What exactly is avalanche failure? Simply put, it is a failure mode caused by the superposition of system voltages such as bus voltage, transformer reflection voltage, leakage inductance spike voltage, etc. between the drain and source of MOSFET on the power board. In short, it is a common failure mode caused by the voltage of the drain and source of MOSFET exceeding its specified voltage value and reaching a certain energy limit. The picture below is the equivalent schematic diagram of avalanche test. As a power engineer, you can have a simple understanding. We may often ask device manufacturers to perform failure analysis on the MOSFET on our power board. Most manufacturers only give a conclusion such as EAS or EOS. So how do we distinguish whether it is an avalanche failure? The following is a picture of a device that has failed in an avalanche test. We can compare it to determine whether it is an avalanche failure. Preventive measures for avalanche failure: Avalanche failure is ultimately a voltage failure, so to prevent it we should focus on voltage. Specific methods can be used as follows: 1) Reasonable derating. At present, the derating in the industry generally selects 80%-95%. The specific situation should be selected according to the company's warranty terms and circuit concerns; 2) Reasonable transformer reflected voltage; 3) Reasonable RCD and TVS absorption circuit design; 51)]4) For high current wiring, try to use thick and short layout structure to minimize wiring parasitic inductance; 5) Choose a reasonable gate resistor Rg; 6) In high power power supply, RC damping or Zener diode can be added as needed for absorption. 02SOA failure (current failure) Let's briefly talk about the second point, SOA failure. SOA failure refers to the destruction mode caused by the abnormally large current and voltage when the power supply is running, which is superimposed on the MOSFET at the same time, causing instantaneous local heating. Or it is the thermal breakdown mode caused by the failure of the chip, heat sink and package to reach thermal equilibrium in time, and the continuous heating makes the temperature exceed the limit of the oxide layer. For the parameter limit values of each line of SOA, please refer to the picture below. 1)Limited by the maximum rated current and pulse current; 51)]2) Limited by RDSON at the maximum junction temperature; [color=rgb(51, 51,3) Limited by the maximum power dissipation of the device; 4) Limited by the maximum single pulse current; 5) Breakdown voltage BVDSS limit area. As long as the MOSFET on our power supply is within the above limit area, the power supply failure problem caused by MOSFET can be effectively avoided. This is an atypical SOA failure dissection diagram. Because the aluminum has been removed, it may not look so direct. Please refer to it. Preventive measures for SOA failure: 1) Ensure that under the worst conditions, all power limit conditions of MOSFET are within the SOA limit line; 2) Make the OCP function precise and detailed. When designing the OCP point, most engineers may take 1.1-1.5 times the current margin, and then start debugging the RSENSE resistor according to the protection voltage of the IC, such as 0.7V. Some experienced people will take into account the actual impact of the detection delay time and CISS on OCP. But at this time, there is a parameter that deserves more attention, that is, the Td (off) of the MOSFET. What effect does it have? Let's look at the FLYBACK current waveform below (the graphic is not very clear, sorry, it is recommended to double-click to enlarge it). ![]() As can be seen from the figure, the current waveform has a drop when it is about to reach the current peak, and there is a period of rise time after this drop point. The essence of this period is that after the IC detects the overcurrent signal and executes the shutdown, the MOSFET itself also starts to execute the shutdown. However, due to the shutdown delay of the device itself, the current will have a secondary rise platform. If the secondary rise platform is too large, then when the transformer margin is insufficient, it is very likely to produce a current shock of magnetic saturation or a failure of the current exceeding the device specification. 3) Reasonable thermal design margin. I won't say much about this. Each company has its own derating specifications. Just strictly implement them. If it doesn't work, add a heat sink. 03 Body diode failure In different topologies and circuits, MOSFET has different roles. For example, in LLC, the speed of the body diode is also an important factor in the reliability of MOSFET. It is difficult to distinguish the body diode failure between drain and source from the drain-source voltage failure because the diode itself is a parasitic parameter. Although it is difficult to distinguish the body cause after failure, there are significant differences in the solutions to prevent voltage and diode failure. It is mainly analyzed in combination with your own circuit. Body diode failure prevention measures: In fact, the body diode does not matter most of the time, and sometimes it is beneficial, such as using it in an H-bridge to save the need for parallel diodes. Of course, there are times when it gets in the way, so you can just connect two MOS tubes head to head or tail to tail in series.]The diode is determined by the process, so you don't have to worry too much about it. Just accept its existence. Also, let me say a few more words. In fact, the D and S of the MOS tube are essentially symmetrical structures, just two contacts of the channel. However, since the opening and closing of the channel involves the electric field between the gate and the substrate, it is necessary to give the substrate a certain potential. And because the MOS tube has only three pins, the substrate needs to be connected to one of the other two pins. Then the pin connected to the substrate is S, and the pin not connected to the substrate is D. When we use it, the potential of S is often stable. In integrated circuits, such as CMOS or analog switches, since the chip itself has power pins, the substrates of those MOS tubes are not connected to the pins, but directly connected to the power supply VCC or VEE. At this time, there is no difference between D and S. 04 Resonance failure Gate parasitic oscillation occurs when the power MOSFET is connected directly without inserting a gate resistor when connected in parallel. When the drain-source voltage is repeatedly turned on and off at high speed, this parasitic oscillation occurs in the resonant circuit formed by the gate-drain capacitance Cgd (Crss) and the gate pin inductance Lg. When the resonance condition (ωL=1/ωC) is met, a vibration voltage much larger than the drive voltage Vgs (in) is applied between the gate and the source, and the gate is destroyed due to exceeding the rated voltage between the gate and the source, or the vibration voltage when turning on and off the drain-source voltage overlaps with the Vgs waveform through the gate-drain capacitance Cgd and causes positive feedback, which may cause oscillation destruction due to malfunction. Resonance failure prevention measures: Resistors can suppress oscillations because of the damping effect. However, connecting a small resistor in series with the gate does not solve the oscillation damping problem. The main reasons are the impedance matching of the drive circuit and the adjustment of the power tube switching time. 05Static failure The basic physical characteristics of static electricity are: there is a force of attraction or repulsion; there is an electric field, and there is a potential difference with the earth; it will generate a discharge current. These three situations will have the following impacts on electronic components: 1) Components absorb dust, change the impedance between circuits, and affect the function and life of components; 2) The insulation layer and conductor of components are destroyed by electric field or current, making the components unable to work (completely destroyed); 3) Due to instantaneous electric field soft breakdown or overheating caused by current, components are damaged. Although they can still work, their life is shortened. Preventive measures for electrostatic failure: The protection diode at the input end of the MOS circuit has a current tolerance of 1mA when it is turned on. When there may be excessive transient input current (over 10mA), an input protection resistor should be connected in series. However, the 129# did not have a protection resistor in the initial design, so this is also the reason why the MOS tube may break down. By replacing a MOS tube with an internal protection resistor, this failure should be prevented. In addition, since the instantaneous energy absorbed by the protection circuit is limited, too large instantaneous signals and excessively high electrostatic voltage will make the protection circuit ineffective. Therefore, the electric soldering iron must be reliably grounded during welding to prevent leakage from breaking down the input end of the device. In general use, the residual heat of the electric soldering iron can be used for welding after the power is turned off, and the ground pin should be welded first. 06 Gate voltage failure The abnormal high voltage of the gate mainly comes from the following three reasons: 1) Static electricity during production, transportation and assembly. 2) High voltage resonance generated by device and circuit parasitic parameters when the power system is working. 3) During high voltage shock, the high voltage is transmitted to the gate through Ggd (in lightning test, failure caused by this reason is more common). As for the PCB pollution level, electrical clearance and other high voltage breakdown IC and then enter the gate, I will not explain too much. Preventive measures for gate voltage failure: Overvoltage protection between gate and source: If the impedance between gate and source is too high, the sudden change in drain-source voltage will be coupled to the gate through the inter-electrode capacitance and produce a relatively high UGS voltage overshoot. This voltage will cause permanent damage to the gate oxide layer. If it is a positive UGS transient voltage, it will also cause the device to be mis-conducted. To this end, the impedance of the gate drive circuit should be appropriately reduced, and a damping resistor or a voltage regulator with a voltage regulation value of about 20V should be connected in parallel between the gate and source. Special attention should be paid to prevent the gate from working in an open circuit. The second is overvoltage protection between the drain electrodes. If there is an inductive load in the circuit, when the device is turned off, the sudden change in drain current (di/dt) will produce a drain voltage overshoot that is much higher than the power supply voltage, causing device damage. Protective measures such as voltage regulator clamping, RC clamping or RC suppression circuit should be adopted.]In addition, MOSFET damage is mainly caused by two reasons: use and quality process. In terms of use: 1) Static electricity damage. In the early stage, it may switch like a good tube, but after a period of time, it will fail and explode, and the GDS will be short-circuited; 2) Space plasma damage. The light one is the same as static electricity damage, and the heavy one will directly short-circuit the GDS. Everyone should pay attention! Do not use negative ion generators or air conditioners with this function where MOSFET or IGBT/CMOS devices are placed; 3) Leakage damage. In most cases, GDS will be completely short-circuited, and in some cases, DS or GD will be open-circuited; 4) Overdrive. When the drive voltage exceeds 18V, GDS will be completely short-circuited after a period of use; BlinkMacSystemFont,]5) Use negative voltage to turn off. After the gate is negatively voltageed, the MOSFET's anti-noise capability is enhanced, but the DS's withstand voltage capability is reduced. Improper negative voltage will cause the DS to be damaged by breakdown and short-circuit the GDS due to insufficient withstand voltage; 6) Gate parasitic induced negative voltage damage is the same as improper negative voltage drive, but the negative voltage is not artificially added, but due to the parasitic LC induction of the line, which generates negative pulses on the gate. This content is originally created by EEWORLD forum user lstj977672866. If you need to reprint or use it for commercial purposes, you must obtain the author's consent and indicate the source
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