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Pulse frequency multiplier composed of gate circuit (CD4011)
Source: InternetPublisher:公子李 Keywords: Gate Circuit Updated: 2024/09/30
The pulse frequency multiplier is composed of two gates in the NAND gate CD4011. One of the gates is used to form an inverter to invert the falling edge of the input pulse, so that the circuit outputs a pulse under the action of the rising edge and falling edge of the input pulse. In this way , the purpose of doubling the frequency of the circuit is achieved. The circuit composition is shown in the figure.
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