1. Layout/wiring, the impact on electrical performance. You will often see such a statement in books about electronics: "Digital ground and analog ground should be separated." Anyone who has laid out a board knows that this is somewhat difficult in actual operation. To lay out a better board, you must first have an electrical understanding of the IC you are using, which pins will generate high-order harmonics (the rising/falling edge of digital signals or switching square wave signals), which pins are prone to electromagnetic interference, and the signal block diagram (signal processing unit block diagram) inside the IC will help us understand. The overall layout is the primary condition for determining electrical performance, and the layout between boards is more concerned with the direction or flow of signals/data between ICs. The general principle is to be close to the power supply part that is prone to electromagnetic radiation; the weak signal processing part is mostly determined by the overall structure of the equipment (that is, the overall planning of the early equipment), as close as possible to the signal input end or detection head (probe), so that the signal-to-noise ratio can be better improved, providing a purer signal/accurate data for subsequent signal processing and data recognition. 2. Processing of PCB copper platinum As the working clock of IC (digital IC) is getting higher and higher, its signal has certain requirements for the width of the line. Wider routing (copper platinum) is good for low-frequency strong current, but it is not the case for high-frequency signals and data line signals. Data signals are more about synchronization, and high-frequency signals are more affected by the skin effect. Therefore, the two should be discussed separately. High-frequency signal routing should be thin rather than wide, short rather than long, which involves layout issues (coupling of signals between devices), which can reduce induced electromagnetic interference. However, data signals appear in the circuit in the form of pulses, and their high-order harmonic components are the decisive factors to ensure the correctness of the signal; the same wide copper platinum will produce skin effect (distributed capacitance/inductance becomes larger) on high-speed data signals, which will cause signal deterioration and incorrect data recognition. In addition, if the line width of the data bus channel is inconsistent, it will affect the synchronization of the data (leading to inconsistent delays). In order to better control the synchronization of data signals, serpentine lines appear in the data bus routing, which is to make the signals in the data channel more consistent in delay. Large-area copper plating is for shielding interference and inductive interference. Double-sided boards can use the ground as the copper plating layer; while multi-layer boards do not have the problem of copper plating, because the power layer in between plays a good role in shielding and isolation. 3. The inter-layer layout of multi-layer boards is explained by taking a four-layer board as an example. The power (positive/negative) layer should be placed in the middle, and the signal layer should be routed in the two outer layers. Note that there should be no signal layer between the positive and negative power layers. The advantage of this approach is to make the power layer play the role of filtering/shielding/isolation as much as possible, and at the same time facilitate the production of PCB manufacturers to improve the yield rate. 4. The design of via engineering should minimize the design of vias, because vias will generate capacitance and are also prone to burrs and electromagnetic radiation. The aperture of the via should be small rather than large (this is for electrical performance; but too small an aperture will increase the difficulty of PCB production. Generally, 0.5mm/0.8mm is commonly used, and 0.3mm is as small as possible). The probability of burrs appearing in small apertures after the copper plating process is lower than that of burrs appearing in large apertures. This is due to the drilling process. 5. Software application. Each software has its ease of use, it just depends on your familiarity with the software. I have used PADS (POWER PCB)/PROTEL. When making simple circuits (circuits that I am familiar with), I will use PADS to directly layout; when making complex and new device circuits, it is better to draw the schematic diagram first and use the network table to do it correctly and conveniently. When laying out the PCB, there are some non-circular holes, and there is no corresponding function in the software to describe them. My usual practice is to open a layer specifically for describing the openings, and then draw the desired opening shape on this layer, and of course fill the drawn wireframe. This is done to better allow PCB manufacturers to recognize their own expressions and explain them in the sample documentation. 6. Send PCB to the manufacturer for sample 1. PCB computer file 2. Layering scheme of PCB file (Each electronic engineer has different drawing habits, and the layout of the PCB file will be different in the application of the layer, so you need to attach a file of your white oil map/green oil map/circuit map/mechanical structure map/auxiliary hole map, and make a correct list document to explain your wishes) 3. PCB production process requirements, you need to attach a document to explain the board making process: gold plating/copper plating/tin spraying/rosin sweeping, board thickness specifications, PCB board material (flame retardant/non-flame retardant). 4. The number of samples 5. Of course, you have to sign the contact information and the person in charge. The level is limited and the writing is not good. I just want to express more technical exchanges here, and share my personal experience with my friends and my common progress.