Let’s learn about the common problems encountered in high-frequency PCB circuit design!
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1. How to choose PCB board?
The selection of PCB material must strike a balance between meeting design requirements, mass production and cost. Design requirements include electrical and mechanical parts. Usually, this material issue is more important when designing very high-speed PCB boards (frequencies greater than GHz).
For example, the dielectric loss of the commonly used FR-4 material at a frequency of several GHz will have a great impact on signal attenuation, so it may not be suitable. In terms of electrical, it is necessary to pay attention to whether the dielectric constant and dielectric loss are suitable for the designed frequency.
2. How to avoid high-frequency interference?
The basic idea to avoid high-frequency interference is to minimize the interference of the electromagnetic field of high-frequency signals, which is also called crosstalk. This can be done by increasing the distance between high-speed signals and analog signals, or adding ground guard/shunt traces next to analog signals. Also pay attention to the noise interference of digital ground on analog ground.
3. How to solve the signal integrity problem in high-speed design?
Signal integrity is basically an impedance matching problem. Factors that affect impedance matching include the architecture and output impedance of the signal source, the characteristic impedance of the trace, the characteristics of the load end, and the topology of the trace. The solution is to rely on termination and adjust the topology of the trace.
4. How is the differential wiring method achieved?
There are two points to note when routing differential pairs. One is that the lengths of the two lines should be as equal as possible, and the other is that the spacing between the two lines (this spacing is determined by the differential impedance) should remain constant, that is, they should remain parallel. There are two ways to achieve parallelism. One is for the two lines to run on the same routing layer (side-by-side), and the other is for the two lines to run on two adjacent layers (over-under). Generally, the former side-by-side (side by side, shoulder to shoulder) is more commonly used.
5. For a clock signal line with only one output end, how to achieve differential wiring?
Differential wiring is only meaningful when both the signal source and the receiving end are differential signals. Therefore, differential wiring cannot be used for clock signals with only one output end.
6. Can a matching resistor be added between the differential line pairs at the receiving end?
Matching resistors are usually added between the differential line pairs at the receiving end, and their values should be equal to the value of the differential impedance. This will improve the signal quality.
7. Why should the wiring of differential pairs be close and parallel?
The routing of differential pairs should be appropriately close and parallel. The so-called appropriate closeness is because this spacing affects the value of differential impedance, which is an important parameter in the design of differential pairs. Parallelism is also required to maintain the consistency of differential impedance. If the two lines are far away or close, the differential impedance will be inconsistent, which will affect signal integrity and timing delay.
8. How to deal with some theoretical conflicts in actual wiring
Basically, it is right to separate the analog and digital grounds. It should be noted that the signal routing should not cross the split area (moat) as much as possible, and the returning current path of the power supply and signal should not be too large.
The crystal oscillator is an analog positive feedback oscillation circuit. To have a stable oscillation signal, the loop gain and phase specifications must be met. However, the oscillation specifications of this analog signal are easily interfered with. Even adding ground guard traces may not completely isolate the interference. Moreover, if it is too far away, the noise on the ground plane will also affect the positive feedback oscillation circuit. Therefore, the distance between the crystal oscillator and the chip must be as close as possible.
It is true that there are many conflicts between high-speed wiring and EMI requirements. But the basic principle is that the resistors, capacitors or ferrite beads added due to EMI cannot cause some electrical characteristics of the signal to be inconsistent with the specifications. Therefore, it is best to first use the techniques of arranging routing and PCB stacking to solve or reduce EMI problems, such as routing high-speed signals on the inner layer. Finally, use resistors, capacitors or ferrite beads to reduce damage to the signal.
9. How to resolve the conflict between manual routing and automatic routing of high-speed signals?
Most of the current powerful routing software's automatic routing tools have set constraints to control the routing method and the number of vias. The routing engine capabilities and constraint setting items of each EDA company sometimes vary greatly. For example, whether there are enough constraints to control the winding method of the serpentine, whether the routing spacing of the differential pair can be controlled, etc.
This will affect whether the routing method generated by automatic routing can meet the designer's ideas. In addition, the difficulty of manually adjusting the routing is also absolutely related to the ability of the winding engine. For example, the pushing ability of the routing, the pushing ability of the vias, and even the pushing ability of the routing on the copper plating, etc. Therefore, choosing a router with a strong winding engine capability is the solution.
10. About test coupon
The test coupon is used to measure the characteristic impedance of the produced PCB board with TDR (Time Domain Reflectometer) to see if it meets the design requirements. Generally, the impedance to be controlled is single line and differential pair. Therefore, the trace width and line spacing (when there is a differential pair) on the test coupon should be the same as the line to be controlled.
The most important thing is the location of the ground point during measurement. In order to reduce the inductance of the ground lead, the TDR probe is usually grounded very close to the probe tip. Therefore, the distance and method between the signal point on the test coupon and the ground point should be consistent with the probe used.
11. In high-speed PCB design, the blank areas of the signal layer can be copper-clad. How should the copper of multiple signal layers be allocated for grounding and power supply?
Generally speaking, copper in the blank area is mostly used for grounding. However, when copper is applied next to high-speed signal lines, attention should be paid to the distance between the copper and the signal line, because the copper applied will slightly reduce the characteristic impedance of the trace. Also, care should be taken not to affect the characteristic impedance of other layers, such as in the dual strip line structure.
12. Can the characteristic impedance of the signal line on the power plane be calculated using the microstrip line model? Can the signal between the power and ground plane be calculated using the stripline model?
Yes, both the power plane and the ground plane must be considered as reference planes when calculating characteristic impedance. For example, a four-layer board: top layer-power layer-ground layer-bottom layer, the top layer trace characteristic impedance model is a microstrip line model with the power plane as the reference plane.
13. Can the automatic generation of test points by software on high-density printed circuit boards generally meet the testing requirements of mass production?
Generally, whether the test points automatically generated by the software meet the test requirements depends on whether the specifications for adding test points meet the requirements of the test equipment. In addition, if the routing is too dense and the specifications for adding test points are strict, it may not be possible to automatically add test points to each line. Of course, you need to manually fill in the places to be tested.
14. Will adding test points affect the quality of high-speed signals?
Whether it will affect the signal quality depends on the method of adding the test point and how fast the signal is. Basically, the additional test point (not using the existing via or DIP pin as the test point) may be added to the line or a small line may be pulled out from the line. The former is equivalent to adding a very small capacitor to the line, while the latter is an additional branch.
Both of these situations will have some impact on high-speed signals, and the extent of the impact is related to the frequency speed of the signal and the edge rate of the signal. The magnitude of the impact can be determined through simulation. In principle, the smaller the test point, the better (of course, it must meet the requirements of the test equipment) and the shorter the branch, the better.
15. When a system is composed of several PCBs, how should the ground wires between the boards be connected?
When the signals or power between the interconnected PCB boards are in operation, for example, when board A sends power or signals to board B, there will be an equal amount of current flowing back from the ground to board A (this is Kirchoff current law). The current on the ground will flow back to the place with the least impedance.
Therefore, at each interface where power or signals are connected, the number of pins allocated to the ground layer cannot be too small to reduce impedance, which can reduce noise on the ground layer. In addition, the entire current loop can be analyzed, especially the part with large current, and the connection method of the ground layer or ground wire can be adjusted to control the flow of current (for example, create low impedance at a certain place to let most of the current flow from this place) to reduce the impact on other more sensitive signals.
16. Can you introduce some foreign technical books and data on high-speed PCB design?
At present, the application of high-speed digital circuits includes communication networks and computers and other related fields. In the communication network field, the operating frequency of PCB boards has reached around GHz, and the number of layers is as many as 40 as far as I know. Due to the advancement of chips, the highest operating frequency of computer-related applications, whether it is a general PC or a server, has reached 400MHz (such as Rambus) or above.
In response to the demand for high-speed and high-density routing, the demand for blind/buried vias, mircrovias and build-up process technology is gradually increasing. These design requirements can be mass-produced by manufacturers.
17. Two commonly referenced characteristic impedance formulas:
Microstrip line (microstrip) Z={87/[sqrt(Er+1.41)]}ln[5.98H/(0.8W+T)], where W is the line width, T is the copper thickness of the trace, H is the distance from the trace to the reference plane, and Er is the dielectric constant of the PCB material.
This formula can only be applied when 0.1<(W/H)<2.0 and 1<(Er)<15.
Stripline Z=[60/sqrt(Er)]ln{4H/[0.67π(T+0.8W)]} Where H is the distance between the two reference planes, and the trace is located in the middle of the two reference planes. This formula can only be applied when W/H<0.35 and T/H<0.25.
18. Can a ground wire be added in the middle of the differential signal line?
Generally, a ground wire cannot be added in the middle of a differential signal. This is because the most important point in the application principle of differential signals is to utilize the benefits brought by the mutual coupling between differential signals, such as flux cancellation and noise immunity. If a ground wire is added in the middle, the coupling effect will be destroyed.
19. Does the design of rigid-flexible boards require special design software and specifications? Where can I get this type of circuit board processing in China?
You can use the software for designing PCB to design Flexible Printed Circuit. You can also use Gerber format to produce FPC manufacturers. Because the manufacturing process is different from that of general PCB, each manufacturer will have its own requirements for the minimum line width, minimum line spacing, and minimum aperture (via) according to their manufacturing capabilities. In addition, you can lay some copper foil at the turning point of the flexible circuit board for reinforcement. As for the manufacturer, you can search "FPC" as a keyword on the Internet and you should be able to find it.
20. What are the principles for properly selecting the grounding points between the PCB and the casing?
The principle of selecting the grounding point between the PCB and the chassis is to use the chassis ground to provide a low impedance path for the returning current and to control the path of this returning current. For example, usually near high-frequency devices or clock generators, the PCB ground layer can be connected to the chassis ground by fixing screws to minimize the entire current loop area, thereby reducing electromagnetic radiation.
21. Which aspects should be considered when debugging a circuit board?
For digital circuits, first determine three things in order:
1. Confirm that all power supply values meet the design requirements. Some systems with multiple power supplies may require certain specifications for the order and speed of starting up certain power supplies.
2. Verify that all clock signal frequencies are working properly and there are no non-monotonic issues on the signal edges.
3. Confirm whether the reset signal meets the specification requirements. If everything is normal, the chip should send the first cycle signal. Next, debug according to the system operation principle and bus protocol.
22. When the size of the circuit board is fixed, if the design needs to accommodate more functions, it is often necessary to increase the routing density of the PCB. However, this may lead to increased mutual interference between the routings. At the same time, too thin routing will make it impossible to reduce impedance. Could an expert introduce some techniques in high-speed (>100MHz) and high-density PCB design?
When designing high-speed and high-density PCBs, crosstalk interference is something that needs special attention, because it has a significant impact on timing and signal integrity. Here are a few things to note:
Control the continuity and matching of the characteristic impedance of the trace.
The size of the trace spacing. The commonly seen spacing is twice the line width. Through simulation, we can understand the impact of trace spacing on timing and signal integrity and find the minimum tolerable spacing. The results of different chip signals may be different.
Select the appropriate termination method.
Avoid having the same routing direction on adjacent layers, or even having the routing lines overlap each other, because this kind of crosstalk is greater than that of adjacent routing lines on the same layer.
Use blind/buried vias to increase the trace area. However, the production cost of the PCB board will increase. In actual implementation, it is indeed difficult to achieve complete parallelism and equal length, but we should still try our best to do so.
In addition, differential termination and common mode termination can be reserved to alleviate the impact on timing and signal integrity.
23. LC circuits are often used for filtering in analog power supplies. But why is LC sometimes less effective than RC filtering?
The comparison of LC and RC filtering effects must consider the frequency band to be filtered and whether the inductance value is appropriate. This is because the reactance of the inductor is related to the inductance value and frequency. If the noise frequency of the power supply is low and the inductance value is not large enough, the filtering effect may not be as good as RC. However, the price to pay for using RC filtering is that the resistor itself consumes energy and has poor efficiency, and attention should be paid to the power that the selected resistor can withstand.
24. What is the method for selecting inductance and capacitance values during filtering?
In addition to considering the noise frequency to be filtered, the selection of inductance value also needs to consider the instantaneous current response capability. If the output end of LC has the opportunity to output a large current instantly, a large inductance value will hinder the speed at which this large current flows through this inductor, increasing ripple noise.
The capacitance value is related to the size of the ripple noise specification value that can be tolerated. The smaller the ripple noise value required, the larger the capacitance value will be. The ESR/ESL of the capacitor will also have an impact. In addition, if this LC is placed at the output end of the switching regulation power supply, it is also necessary to pay attention to the impact of the pole/zero generated by this LC on the stability of the negative feedback control loop.
25. How to meet EMC requirements as much as possible without causing too much cost pressure?
The increased cost on PCB boards due to EMC is usually due to the increase in the number of ground layers to enhance the shielding effect and the addition of ferrite beads, chokes and other high-frequency harmonic suppression devices. In addition, it is usually necessary to match the shielding structure of other mechanisms to make the entire system pass the EMC requirements. The following only provides a few PCB design techniques to reduce the electromagnetic radiation effect generated by the circuit.
Whenever possible, use devices with slower signal slew rates to reduce the high-frequency components generated by the signal.
Pay attention to the placement of high-frequency components and avoid placing them too close to external connectors.
Pay attention to the impedance matching of high-speed signals, routing layers and their return current paths to reduce high-frequency reflections and radiation.
Place enough and appropriate decoupling capacitors at the power pins of each device to mitigate the noise on the power layer and ground layer. Pay special attention to whether the frequency response and temperature characteristics of the capacitors meet the design requirements.
The ground near the external connector can be properly separated from the ground layer, and the ground of the connector can be connected to the chassis ground as close as possible.
Ground guard/shunt traces can be used appropriately next to some particularly high-speed signals, but attention should be paid to the impact of guard/shunt traces on the characteristic impedance of the traces.
The power layer is 20H smaller than the ground layer, where H is the distance between the power layer and the ground layer.
26. When there are multiple digital/analog functional blocks on a PCB board, the conventional practice is to separate the digital/analog grounds. Why?
The reason for separating the digital and analog grounds is that when the digital circuit switches between high and low potentials, it will generate noise on the power supply and ground. The magnitude of the noise is related to the speed of the signal and the magnitude of the current. If the ground plane is not divided and the noise generated by the digital area circuit is large and the analog area circuit is very close, then even if the digital and analog signals do not cross, the analog signal will still be interfered by the ground noise. In other words, the method of not dividing the digital and analog grounds can only be used when the analog circuit area is far away from the digital circuit area that generates large noise.
27. Another approach is to ensure that the digital/analog layout is separated and the digital/analog signal lines do not cross each other, and the entire PCB board ground is not divided, and the digital/analog ground is connected to this ground plane. What is the reason?
The requirement that digital and analog signal traces cannot cross is because the return current path of a faster digital signal will try to flow back to the source of the digital signal along the ground near the bottom of the trace. If the digital and analog signal traces cross, the noise generated by the return current will appear in the analog circuit area.
28. When designing high-speed PCB schematics, how do you consider impedance matching issues?
When designing high-speed PCB circuits, impedance matching is one of the design elements. The impedance value is absolutely related to the routing method, such as whether it is on the surface layer (microstrip) or the inner layer (stripline/double stripline), the distance from the reference layer (power layer or ground layer), the routing width, the PCB material, etc., all of which will affect the characteristic impedance value of the routing. In other words, the impedance value can only be determined after routing.
Generally, simulation software cannot take into account some impedance discontinuity wiring situations due to the circuit model or the mathematical algorithm used. At this time, only some terminators (terminations), such as series resistors, can be reserved on the schematic diagram to alleviate the effect of impedance discontinuity. The real fundamental solution to the problem is to try to avoid impedance discontinuity during wiring.
29. Where can I find a more accurate IBIS model library?
The accuracy of the IBIS model directly affects the simulation results. Basically, IBIS can be regarded as the electrical characteristic data of the actual chip I/O buffer equivalent circuit, which can generally be converted from the SPICE model (it can also be measured, but it is more difficult). The SPICE data is absolutely related to chip manufacturing, so the SPICE data of the same device provided by different chip manufacturers is different, and the data in the converted IBIS model will also vary accordingly.
In other words, if you use a device from manufacturer A, only they are able to provide accurate model data for their devices, because no one else knows better than them what process their devices are made of. If the IBIS provided by the manufacturer is inaccurate, the only fundamental solution is to constantly ask the manufacturer to improve it.
30. When designing high-speed PCB, from which aspects should designers consider EMC and EMI rules?
Generally, EMI/EMC design needs to consider both radiated and conducted aspects. The former belongs to the higher frequency part (>30MHz) and the latter belongs to the lower frequency part (<30MHz). Therefore, we cannot only pay attention to the high frequency and ignore the low frequency part.
A good EMI/EMC design must consider the device location, PCB stacking arrangement, important connection routing, device selection, etc. at the beginning of the layout. If these are not arranged in advance, solving them afterwards will be ineffective and increase costs.
For example, the location of the clock generator should be as close as possible to the external connector, high-speed signals should be routed on the inner layer as much as possible and attention should be paid to characteristic impedance matching and continuity of the reference layer to reduce reflection, the slew rate of the signal pushed by the device should be as small as possible to reduce high-frequency components, and when selecting decoupling (decoupling/bypass) capacitors, attention should be paid to whether their frequency response meets the requirements to reduce power layer noise.
In addition, pay attention to the return path of the high-frequency signal current to make its loop area as small as possible (that is, the loop impedance is as small as possible) to reduce radiation. You can also use the method of splitting the ground layer to control the range of high-frequency noise. Finally, choose the grounding point (chassis ground) of the PCB and the casing appropriately.
31. How to choose EDA tools?
Thermal analysis is not a strong point in current PCB design software, so it is not recommended. For other functions 1.3.4, you can choose PADS or Cadence, which have good performance and price ratio. Beginners in PLD design can use the integrated environment provided by PLD chip manufacturers, and single-point tools can be used when designing more than one million gates.
32. Please recommend an EDA software suitable for high-speed signal processing and transmission
For conventional circuit design, INNOVEDA's PADS is very good, and it has matching simulation software, and this type of design often accounts for 70% of the application occasions. When doing high-speed circuit design, analog and digital mixed circuits, the Cadence solution should be a software with better performance and price. Of course, Mentor's performance is still very good, especially its design process management should be the best. (Wang Sheng, technical expert of Datang Telecom)
33. Explanation of the meaning of each layer of PCB board
Topoverlay ----Top-level device name, also called top silkscreen or top component legend, such as R1 C5,
IC10.bottomoverlay----Similarly for multilayer-----If you design a 4-layer board, you place a free pad or via, and define it as multilay, then its pad will automatically appear on the 4 layers. If you only define it as the top layer, then its pad will only appear on the top layer.
34. What aspects should be paid attention to in the design, routing and layout of high-frequency PCB above 2G?
High-frequency PCBs above 2G belong to RF circuit design and are not within the scope of high-speed digital circuit design. The layout and routing of RF circuits should be considered together with the schematic diagram, because layout and routing will cause distribution effects.
Moreover, some passive components in RF circuit design are implemented through parameterized definition and special-shaped copper foil, so EDA tools are required to provide parameterized components and be able to edit special-shaped copper foil.
Mentor's boardstation has a dedicated RF design module that can meet these requirements. In addition, general RF design requires a dedicated RF circuit analysis tool, the most famous of which is Agilent's EESoft, which has a good interface with Mentor's tools.
35. In high-frequency PCB design above 2G, what rules should be followed in microstrip design?
RF microstrip line design requires the use of a 3D field analysis tool to extract transmission line parameters. All rules should be specified in this field extraction tool.
36. For a fully digital signal PCB, there is an 80MHz clock source on the board. In addition to using silk screen (grounding), what kind of circuit should be used for protection in order to ensure sufficient driving capability?
To ensure the driving capability of the clock, it should not be achieved through protection. Generally, a clock driver chip is used. Generally, the concern about the clock driving capability is caused by multiple clock loads. A clock driver chip is used to convert one clock signal into several, using point-to-point connection.
When selecting a driver chip, in addition to ensuring basic matching with the load and that the signal edge meets the requirements (generally the clock is an edge-valid signal), the clock delay in the driver chip must be taken into account when calculating the system timing.
37. If a separate clock signal board is used, what kind of interface is generally used to ensure that the transmission of the clock signal is less affected?
The shorter the clock signal, the smaller the transmission line effect. Using a separate clock signal board will increase the signal wiring length. And the grounding and power supply of the single board are also a problem. If you want to transmit over long distances, it is recommended to use differential signals. LVDS signals can meet the driving capability requirements, but if your clock is not too fast, it is not necessary.
38. 27M, SDRAM clock line (80M-90M), the second and third harmonics of these clock lines are just in the VHF band, and the high frequency interference from the receiving end is very large. In addition to shortening the line length, what other good methods are there?
If the third harmonic is large and the second harmonic is small, it may be because the signal duty cycle is 50%, because in this case, the signal has no even harmonics. At this time, the signal duty cycle needs to be modified. In addition, for unidirectional clock signals, source-end series matching is generally used. This can suppress secondary reflections but will not affect the clock edge rate. The source-end matching value can be obtained using the formula in the figure below.
39. What is the routing topology?
Topology, also called routing order. The wiring order for a network with multiple ports.
40. How to adjust the routing topology to improve signal integrity?
The signal direction of this network is more complicated, because the topology has different effects on unidirectional and bidirectional signals, and signals of different levels and types. It is difficult to say which topology is beneficial to signal quality. In addition, when doing pre-simulation, it is very demanding for engineers to know which topology to use, and they must understand the circuit principles, signal types, and even wiring difficulties.
41. How to reduce EMI problems by arranging the stack?
First of all, EMI should be considered from a system perspective. PCB alone cannot solve the problem. As for EMI, I think the main function of stacking is to provide the shortest return path for signals, reduce the coupling area, and suppress differential mode interference. In addition, the ground layer is tightly coupled with the power layer, and appropriately extended beyond the power layer, which is beneficial for suppressing common mode interference.
42. Why do we need to lay copper?
There are generally several reasons for copper plating.
1. EMC. For large-area ground or power copper, it will play a shielding role. Some special grounds, such as PGND, play a protective role.
2. PCB process requirements. Generally, in order to ensure the electroplating effect or prevent lamination from deformation, copper is laid on PCB layers with fewer wiring.
3. Signal integrity requires a complete return path for high-frequency digital signals and reduces the wiring of DC networks. Of course, there are also reasons such as heat dissipation and copper plating required for the installation of special devices.
43. In a system, DSP and PLD are included. What issues should be paid attention to during wiring?
Look at the ratio of your signal rate to the wiring length. If the signal delay in the transmission line is comparable to the signal change time, you need to consider the signal integrity issue. In addition, for multiple DSPs, clocks, and data signal routing topologies will also affect signal quality and timing, which requires attention.
44. In addition to protel tool wiring, are there any other good tools?
As for tools, in addition to PROTEL, there are many wiring tools, such as MENTOR's WG2000, EN2000 series and powerpcb, Cadence's allegro, Zuken's cadstar, cr5000, etc., each has its own strengths.
45. What is the “signal return path”?
Signal return path, that is, return current. When high-speed digital signals are transmitted, the signal flows from the driver along the PCB transmission line to the load, and then from the load along the ground or power supply through the shortest path back to the driver end. This return signal on the ground or power supply is called the signal return path. Dr.Johson explained in his book that high-frequency signal transmission is actually the process of charging the dielectric capacitor sandwiched between the transmission line and the DC layer. SI analyzes the electromagnetic characteristics of this enclosure and the coupling between them.
46. How to connect the plug-in to perform SI analysis?
In the IBIS3.2 specification, there is a description of the connector model. Generally, the EBD model is used. If it is a special board, such as a backplane, a SPICE model is required. You can also use multi-board simulation software (HYPERLYNX or IS_multiboard). When establishing a multi-board system, enter the distributed parameters of the connector, which are generally obtained from the connector manual. Of course, this method will not be accurate enough, but as long as it is within an acceptable range, it is fine.
47. What are the termination methods?
Termination, also known as matching, is generally divided into source-end matching and terminal matching according to the matching position. Source-end matching is generally resistor series matching, and terminal matching is generally parallel matching. There are many ways, including resistor pull-up, resistor pull-down, Thevenin matching, AC matching, and Schottky diode matching.
48. What factors determine the termination (matching) method?
The matching method is generally determined by the BUFFER characteristics, topology, level type and judgment method, and the signal duty cycle, system power consumption, etc. must also be considered.
49. What are the rules for termination (matching)?
The most critical issue in digital circuits is timing. The purpose of adding matching is to improve signal quality and obtain a certain signal at the time of judgment. For level-valid signals, the signal quality is stable under the premise of ensuring the setup and hold time; for delay-valid signals, the signal change delay speed meets the requirements under the premise of ensuring the monotonicity of the signal delay. Mentor ICX product textbooks contain some information about matching.
In addition, "High Speed Digital Design a Hand Book of Blackmagic" has a chapter dedicated to terminals, which explains the role of matching in signal integrity from the principle of electromagnetic waves, which can be used for reference.
50. Can the IBIS model of a device be used to simulate the logical function of the device? If not, how can the board-level and system-level simulation of the circuit be performed?
IBIS models are behavioral models and cannot be used for functional simulation. Functional simulation requires SPICE models or other structural models.
51. In a system where digital and analog coexist, there are two processing methods. One is to separate the digital ground and the analog ground. For example, in the ground layer, the digital ground is an independent piece, the analog ground is an independent piece, and the single point is connected with copper foil or FB magnetic beads, while the power supply is not separated; the other is to separate the analog power supply and the digital power supply with FB connection, and the ground is unified. Mr. Li, do these two methods have the same effect?
It should be said that in principle, they are the same, because the power supply and ground are equivalent to high-frequency signals.
The purpose of distinguishing between analog and digital parts is to resist interference, mainly the interference of digital circuits on analog circuits. However, the separation may cause incomplete signal return path, affect the signal quality of digital signals, and affect the EMC quality of the system.
Therefore, no matter which plane is split, it depends on whether the signal return path is enlarged and how much interference the return signal has on the normal working signal. There are also some hybrid designs that do not distinguish between power supply and ground. When laying out, the digital part and the analog part are laid out and wired separately to avoid cross-area signals.
52. Safety issue: What are the specific meanings of FCC and EMC?
FCC: Federal Communications Commission
EMC: Electro megnetic compatibility
FCC is a standards organization, and EMC is a standard. The promulgation of standards has corresponding reasons, standards and test methods.
53. What is differential wiring?
Differential signal, also called differential signal, uses two identical signals with opposite polarities to transmit one data path, and makes judgments based on the difference in the signal levels. In order to ensure that the two signals are completely consistent, they must be kept parallel during wiring, and the line width and line spacing must remain unchanged.
54. What are the PCB simulation software?
There are many types of simulation. Commonly used software for high-speed digital circuit signal integrity analysis (SI) include icx, signalvision, hyperlynx, XTK, speectraquest, etc. Some also use Hspice.
55. How does PCB simulation software perform LAYOUT simulation?
In high-speed digital circuits, in order to improve signal quality and reduce wiring difficulty, multi-layer boards are generally used to allocate dedicated power layers and ground layers.
56. How to ensure the stability of signals above 50M during layout and wiring?
The key to high-speed digital signal routing is to reduce the impact of transmission lines on signal quality. Therefore, when laying out high-speed signals above 100M, signal routing is required to be as short as possible. In digital circuits, high-speed signals are defined by signal rise delay time. Moreover, different types of signals (such as TTL, GTL, LVTTL) have different methods for ensuring signal quality.
57. The RF part, IF part, and even the low-frequency circuit part for monitoring the outdoor unit are often deployed on the same PCB. What are the material requirements for such PCB? How to prevent interference between RF, IF, and even low-frequency circuits?
Hybrid circuit design is a big problem. It is difficult to have a perfect solution.
Generally, RF circuits are laid out and wired as an independent single board in the system, and there may even be a special shielding cavity. Moreover, RF circuits are generally single-sided or double-sided boards, and the circuits are relatively simple. All of these are to reduce the impact on the distributed parameters of the RF circuit and improve the consistency of the RF system.
Compared with the general FR4 material, RF circuit boards tend to use high-Q value substrates. The dielectric constant of this material is relatively small, the transmission line distributed capacitance is small, the impedance is high, and the signal transmission delay is small. In the hybrid circuit design, although the RF and digital circuits are made on the same PCB, they are generally divided into RF circuit area and digital circuit area, and the layout and wiring are respectively used. The grounding vias and shielding boxes are used for shielding.
58. For the RF part, the IF part and the low-frequency circuit part deployed on the same PCB, what solutions does mentor have?
Mentor's board-level system design software, in addition to basic circuit design functions, also has a dedicated RF design module. In the RF schematic design module, parameterized device models are provided, and a two-way interface with RF circuit analysis and simulation tools such as EESOFT is provided; in the RF LAYOUT module, a pattern editing function specifically used for RF circuit layout and routing is provided, and a two-way interface with RF circuit analysis and simulation tools such as EESOFT is also provided. The results after analysis and simulation can be back-labeled to the schematic diagram and PCB.
At the same time, using the design management function of Mentor software, you can easily realize design reuse, design derivation, and collaborative design. It greatly accelerates the design process of mixed circuits. Mobile phone boards are typical mixed circuit designs, and many large mobile phone design manufacturers use Mentor plus Angel's eesoft as a design platform.
59. What is Mentor’s product structure?
Mentor Graphics' PCB tools include the WG (formerly Veribest) series and the Enterprise (boardstation) series.
60. How does Mentor's PCB design software support BGA, PGA, COB and other packages?
Mentor's autoactive RE was developed from the acquired Veribest and is the industry's first gridless, any-angle router.
As we all know, for ball grid array, COB devices, gridless, any angle router is the key to solve the routing pass rate. In the latest autoactive RE, new functions such as push via, copper foil, REROUTE are added to make it more convenient to use. In addition, it supports high-speed routing, including signal routing with delay requirements and differential pair routing.
61. How does Mentor's PCB design software handle differential lines?
After the Mentor software defines the differential pair properties, the two differential pairs can be routed together, strictly ensuring the differential pair line width, spacing and length difference. They can be automatically separated when encountering obstacles, and the via method can be selected when changing layers.
62. On a 12-layer PCB board, there are three power supply layers: 2.2v, 3.3v, and 5v. The three power supplies are placed on one layer each. How should the ground wire be handled?
Generally speaking, it is better to have three power supplies on three layers, because it is unlikely that the signal will be split across the plane layer. Cross-split is a key factor affecting signal quality, but simulation software generally ignores it. For high-frequency signals, the power layer and the ground layer are equivalent.
In practice, in addition to considering signal quality, power plane coupling (using adjacent ground planes to reduce the AC impedance of the power plane) and stacking symmetry are factors that need to be considered.
63. How to check whether the PCB meets the design process requirements before leaving the factory?
Many PCB manufacturers conduct a powered network continuity test before the PCB is shipped out of the factory to ensure that all the connections are correct. At the same time, more and more manufacturers also use X-ray testing to check for some faults during etching or lamination. For the finished board after SMT processing, ICT testing is generally used for inspection, which requires adding ICT test points during PCB design. If there is a problem, a special X-ray inspection device can also be used to rule out whether the fault is caused by processing.
64. Is “mechanism protection” the same as casing protection?
Yes. The housing should be as tight as possible, with little or no conductive material, and grounded as much as possible.
65. When selecting a chip, do we also need to consider the ESD problem of the chip itself?
Whether it is a double-layer board or a multi-layer board, the ground area should be increased as much as possible. When selecting a chip, the ESD characteristics of the chip itself should be considered. These are generally mentioned in the chip description, and even the same chip from different manufacturers will have different performances. Pay more attention during design and consider it more comprehensively, and the performance of the circuit board will be guaranteed to a certain extent. However, ESD problems may still occur, so the protection of the mechanism is also very important for ESD protection.
66. When making a PCB board, in order to reduce interference, should the ground wire be closed?
When making PCB boards, generally speaking, the loop area should be reduced to reduce interference. When laying out the ground wire, it should not be laid out in a closed form, but it is better to lay it out in a tree-like shape. In addition, the ground area should be increased as much as possible.
67. If the emulator uses one power supply and the PCB board uses another power supply, should the grounds of these two power supplies be connected together?
If you can use separate power supplies, it is better, because it is not easy to cause interference between the power supplies, but most devices have specific requirements. Since the simulator and PCB board use two power supplies, I think they should not share the same ground.
68. A circuit is composed of several PCB boards. Should they share a common ground?
A circuit is composed of several PCBs, most of which require a common ground, because it is not practical to use several power supplies in one circuit. But if you have specific conditions, you can use different power supplies, of course, the interference will be less.
69. Design a handheld product with LCD and metal casing.
When testing ESD, it cannot pass the ICE-1000-4-2 test. CONTACT can only pass 1100V, and AIR can pass 6000V. When testing ESD coupling, it can only pass 3000V horizontally and 4000V vertically. The CPU main frequency is 33MHZ. Is there any way to pass the ESD test?
Handheld products have metal shells, so ESD problems are more obvious, and LCDs are also likely to have more adverse phenomena. If there is no way to change the existing metal material, it is recommended to add anti-electric materials inside the mechanism, strengthen the PCB ground, and find a way to ground the LCD. Of course, how to do it depends on the specific situation.
70. When designing a system containing DSP and PLD, from which aspects should ESD be considered?
For general systems, the main consideration is the parts that are in direct contact with the human body, and appropriate protection should be provided in the circuit and mechanism. As for how much impact ESD will have on the system, it depends on different situations. In a dry environment, the ESD phenomenon will be more serious, and the impact of ESD will be relatively obvious in more sensitive and delicate systems. Although the impact of ESD is sometimes not obvious in large systems, more attention should be paid during design to prevent it as much as possible.
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