Playing with Zynq Serial 23 - Creation and packaging of user-defined IP cores

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Playing with Zynq Serial 23 - Creation and packaging of user-defined IP cores [Copy link]

1 Overview

This section takes the led_controller_ip project in the zstar_ex04 folder as an example to demonstrate how to create an IP core for a simple LED flashing control module .

To create a user-defined IP core, you only need to follow the following 3 steps.

2. Create IP core

First, we create a new project in the folder .../project/zstar_ex04/led_controller_ip and add a Verilog source code file named led_controller.v to this project. The source code is as follows.

module led_controller(

input clk, // clock signal

input rst_n, // reset signal, low level is valid

output sled //LED indicator interface

);

parameter CLK_FREQUENCY = 25000; //clk clock frequency, KHz

parameter LED_FLASH_FREQUENCY = 1; //LED output flashing frequency, Hz

`define MAX_CNT (((CLK_FREQUENCY/LED_FLASH_FREQUENCY)*1000)-1) // maximum value of cnt frequency division count

`define MAX_CNT_DIV2 (`MAX_CNT/2-1) // half of the maximum value of cnt division count

//-------------------------------------

reg[31:0] cnt; // Counter

//cnt counter counts in a loop

always @ (posedgeclk or negedgerst_n)

if(!rst_n) cnt<= 32'd0;

else if(cnt< `MAX_CNT) cnt<= cnt+1'b1;

else cnt<= 32'd0;

assign sled = (cnt< `MAX_CNT_DIV2) ? 1'b1:1'b0;

endmodule

Note that this source code implements a fixed frequency flashing of an output LED indicator under clock and reset signals . The clock frequency CLK_FREQUENCY and the LED flashing frequency LED_FLASH_FREQUENCY are both defined as parameters . When making the IP core later, they can be configured as GUI for users who call the IP to manually set. Note that similar parameters that users are expected to set on the GUI must be defined as parameters in the source code .

As shown in the figure, the project only contains the led_controller.v source code file. After creating the project and adding the project source code, it is recommended to compile the project as necessary to avoid any syntax errors or any incompatibility errors with the supported device family.

The figure only contains the project of led_controller.v source code

As shown in the figure, click the project menu Tools à Create and Package IP… .

Figure 1. Create and Package IP menu

The first page of Create and Package IP pops up , click Next .

The Package Options selection dialog box as shown in the figure pops up , check the Package your current project option, and then click Next .

Figure Package your current project selection page

As shown in the figure, the IP path setting dialog box pops up. It is recommended to set the IP location path to be exactly the same as the path where the source code is located (usually the .../zstar.srcs/source_1/new folder in the project directory ). After setting, continue to click Next .

Figure 1. Generate IP path selection page

Click Finish as shown .

Figure New IP Creation page

At this point, in the main project interface, as shown in the figure, an IP-XACT folder is added under Sources à Design Sources on the right. After expanding it, you can see that a new component.xml file has been added. This file corresponds to the Package IP – led_controller page on the right side of the figure, which stores the relevant configuration information of the newly created IP core.

Main interface of the graph project

As shown in the figure, the first configuration page of Package IP – led_controller is named Identification , which is the configuration information related to the user-customized IP core, such as IP core vendor ( Vendor ), library name ( Library ), IP core name ( Name ), version number ( Version ), IP core display name ( Display name ), description ( Description ), vendor display name ( Vendor display name ), company website ( Company url ), etc. Special reminder: don’t ignore the Categories item at the bottom, which is blank by default. If you click the small plus sign on the right, you can add a name. For example, this example adds a name option called UserIP . In the future, the generated user-customized IP core will be classified into a folder called UserIP category in our IP core configuration panel.

Figure Identification configuration page

As shown in the figure, the Compatibility page has actually been determined when we just created this project and selected the device family, that is, setting the device family ( Family ) supported by the IP core .

Figure Compatibility configuration page

As shown in the figure, you can preview the relevant source code files contained in the IP core here. All Verilog source code or simulation test scripts included in the source code project will also appear here and be integrated into the IP core.

Figure File Groups configuration page

As shown in the figure, the Customization Parameters configuration page lists all configurable parameters in the source code ( defined by parameter ). You can double-click these parameters for further configuration.

Figure Customization Parameters configuration page

If we double-click the row where the CLK_FREQUENCY parameter is located, the configuration page shown in the figure will pop up. In this configuration page, we can configure whether the parameter is visible in the GUI ( Visible in Customization GUI ), whether the name is displayed ( Show Name ), etc. Users can set it according to the actual situation of different parameters.

Figure Edit IP Parameter configuration page

As shown in the figure, the Ports and Interfaces configuration page displays the external interfaces of the IP core.

Figure Ports and Interfaces configuration page

As shown in the figure, the Addressing and Memory configuration page is for IP cores that have bus interfaces and have multiple registers that need to be addressed. Our IP core does not need this, so it is blank.

Figure Addressing and Memory configuration page

As shown in the figure, the Customization GUI configuration page displays the layout and preview information of the current interface on the GUI .

Figure Customization GUI configuration page

Finally, as shown in the figure, this is the Review and Package configuration page, where you can review some of the settings above and go back to make corresponding changes. Click Package IP to generate IP .

Figure Review and Package configuration page

At this point, the IP core has been configured and packaged.

As shown in the figure, in the Project Manager panel, if you click Package IP , you can return to the IP core configuration page to make changes. If you click IP Catalog , you can add IP cores.

Figure 1. Project Manager panel

As shown in the figure, after opening the IP Catalog , we can see that the user IP core led_controller_v1_0 just defined has appeared under the UserIP folder.

Figure IP Catalog page

This content is originally created by EEWORLD forum user ove . If you want to reprint or use it for commercial purposes, you must obtain the author's consent and indicate the source