Playing with Zynq Serial 25——[ex04] Custom IP Core Integration Based on Zynq PL

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Playing with Zynq Serial 25——[ex04] Custom IP Core Integration Based on Zynq PL [Copy link]

1 Overview

In this example, the led_controller.v module in the zstar_ex03 project is added to the Vivado IP Catalog as a user-defined IP core , and then configured and added to the Vivado project just like a standard IP core .

2. Creation and packaging of user-defined IP cores

Refer to the document "Playing with Zynq- Tools: Creation and Packaging of User-Defined IP Cores.pdf " to create an LED control IP core with adjustable flashing frequency .

3. Migration of user-defined IP cores

Refer to the document "Playing with Zynq- Tools: Migrating User- Defined IP Cores.pdf " to migrate the LED flashing IP core to the application project.

4Configure and instantiate IP core

As shown in the figure, double-click the led_controller_ip under the IP Catalog , and the IP configuration dialog box will pop up. You can modify the settings and enter the clock frequency ( Clk Frequency ) and LED flash frequency ( Led Flash Frequency ) of this IP core . After completing the configuration, just click OK .

Figure IP core configuration page

As shown in the figure, in the Project Manager -> IP Source panel, expand the newly created IP core, double-click led_controller_0.veo to open the instantiation template, copy it to our project logic, and modify the corresponding interface to use it.

Figure IP core instantiation template

The functions to be implemented in this example are the same as those in the zstar_ex03 example, which is to make the three LEDs work at different clock frequencies, but control them to produce the same LED flashing frequency and flash synchronously. Unlike the top-level source code of the zstar_ex03 example, the LED flashing submodule instantiated here is an IP core created by ourselves , and the setting of its input clock frequency and LED flashing frequency can be completed through the configuration GUI of the IP core , without passing these parameters through the code.

As with the previous IP addition of led_controller_0 , we add two more IP cores , led_controller_1 and led_controller_2 , and set their LED flash frequency to 1 (Hz) , but the input clock frequency to 50000 ( 50MHz ) and 100000 ( 100MHz ) respectively. Then instantiate them into the top-level source code of the project.

The source code of this example project is as follows.

module zstar(

input ext_clk_25m, // External input 25MHz clock signal

output[2:0] led //LED indicator interface

);

//-------------------------------------

wire clk_25m; //PLL outputs 25MHz clock

wire clk_50m; //PLL outputs 50MHz clock

wire clk_100m; //PLL outputs 100MHz clock

wire sys_rst_n; // The locked signal output by PLL is used as the reset signal inside the FPGA . Low level resets and high level works normally.

clk_wiz_0 uut_clk_wiz_0

(

// Clock in ports

.clk_in1(ext_clk_25m), // input clk_in1

// Clock out ports

.clk_out1(clk_25m), // output clk_out1

.clk_out2(clk_50m), // output clk_out2

.clk_out3(clk_100m), // output clk_out3

// Status and control signals

.reset(1'b0), // input reset

.locked(sys_rst_n)); // output locked

//-------------------------------------

//25MHz clock frequency division flashing

led_controller_0 uut_led_controller_clk25m (

.clk(clk_25m), // input wire clk

.rst_n(sys_rst_n), // input wire rst_n

.sled(led[2]) // output wire sled

);

//-------------------------------------

//50MHz clock frequency division flashing

led_controller_1 uut_led_controller_clk50m (

.clk(clk_50m), // input wire clk

.rst_n(sys_rst_n), // input wire rst_n

.sled(led[1]) // output wire sled

);

//-------------------------------------

//100MHz clock frequency division flashing

led_controller_2 uut_led_controller_clk100m (

.clk(clk_100m), // input wire clk

.rst_n(sys_rst_n), // input wire rst_n

.sled(led[0]) // output wire sled

);

endmodule

5. Board-level debugging

Refer to the document "Playing with Zynq- Environment: XilinxPlatformCableUSB Downloader User Guide.pdf " to download the zstar.bit file in the "...\project\zstar_ex04\zstar_ex04\zstar.runs\impl_1" folder to the STAR board. You can see that the three LED indicators flash synchronously, and their frequencies are exactly the same.

This content is originally created by EEWORLD forum user ove . If you want to reprint or use it for commercial purposes, you must obtain the author's consent and indicate the source