1431 views|2 replies

56

Posts

0

Resources
The OP
 

Playing with Zynq Serial 19——[ex02] A happy running water lamp based on Zynq PL [Copy link]

1. Function Overview

Zstar 's Zynq PL is connected to 3 LED indicators. As shown in the figure, the 3 LED indicators are connected in series with a 510 ohm current limiting resistor at the positive pole, and then connected to a 3.3V voltage, and the negative pole at the other end is connected to the IO of the PL . By controlling the IO of the PL to output a high or low level, the LED can be turned on or off.

The function of this example is relatively simple. Through the timer inside the FPGA , each LED is cycled to light up , achieving the effect of a running light. As shown in the figure, there are 3 LED indicators. We assign values to them in turn. Only one LED is lit at a time, and the time for lighting a certain LED each time is fixed (fixed delay). The 3 LEDs are lit up in turn, and the cycle can achieve the effect of a running light.

As shown in the figure, there is a row of LED indicators at the lower left side of the Zstar board. From left to right , the 4th , 5th and 6th LED indicators are D3 , D2 and D1 respectively .

2. Board-level debugging

Refer to the document "Playing with Zynq- Environment: XilinxPlatformCableUSB Downloader User Guide" to burn the zstar.bit file in the ...\project\zstar_ex02\zstar.runs\impl_1 path into Zynq .

You can see that the three LEDs D1 , D2 and D3 are lighting up continuously in a cycle.



This content is originally created by EEWORLD forum user ove . If you want to reprint or use it for commercial purposes, you must obtain the author's consent and indicate the source

This post is from FPGA/CPLD

Latest reply

FPGA should be more efficient for lighting   Details Published on 2019-12-24 17:11
 

4817

Posts

4

Resources
2
 

It would be great if every experiment could be explained in terms of hardware rather than in terms of literature. That’s why I prefer DIY.

This post is from FPGA/CPLD
 
 

2w

Posts

341

Resources
3
 

FPGA should be more efficient for lighting

This post is from FPGA/CPLD
 
 
 

Just looking around
Find a datasheet?

EEWorld Datasheet Technical Support

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号
快速回复 返回顶部 Return list