Apple to use TSMC's 5nm technology in A15 chip

According to Taiwan's Commercial Times, Apple will launch new iPad and iPhone 12 product lines in the second half of this year, using its own A14 series processors. Among them, the iPad Air and the entire iPhone 12 series use the A14 application processor, and the Arm-based Macbook to be released in November will use the self-developed A14X processor. Apple's A14 and A14X are already in mass production at TSMC using a 5-nanometer process.

According to reports, Apple has started developing the next-generation A15 series processors, which are expected to adopt TSMC's enhanced 5nm (N5P) process and start production in the third quarter of next year.

TSMC, the leading wafer foundry, and ASML, a major lithography equipment manufacturer, revealed more details about 3nm at a corporate briefing last week. TSMC's 3nm uses FinFET architecture and extreme ultraviolet (EUV) lithography technology. The logic density will increase by 70% compared to 5nm, and the number of EUV mask layers will double and exceed 20. Therefore, TSMC is actively purchasing EUV exposure equipment. In the next three to five years, it will still be the semiconductor factory with the world's largest EUV production capacity. Suppliers including JDT and Chongyue are expected to benefit.

TSMC's EUV lithography technology has entered mass production and its processes cover 7+nm, 6nm, and 5nm. According to equipment industry sources, TSMC's 7+nm uses up to four EUV mask layers, and AMD's new generation Zen 3 architecture processor is expected to be mass-produced using this process. 6nm has entered mass production in the fourth quarter, and the number of EUV mask layers increases by one layer compared to 7+nm. Major manufacturers including MediaTek, Nvidia, and Intel will all use 6nm to produce their next-generation products.

TSMC will start mass production of 5nm process in the second half of the year, mainly for Apple's mass production of A14 and A14X processors. AMD, Qualcomm, Nvidia, Intel, Broadcom, Marvell, etc. will introduce 5nm process to mass produce new generation products after next year. The number of EUV mask layers of 5nm can reach up to 14 layers, so the first to third phases of Fab 18 have built huge EUV exposure equipment. In response to strong demand, TSMC will launch the enhanced version of 5nm N5P process and introduce mass production next year, and will launch the 4nm process after the 5nm optimization the year after. Equipment manufacturers expect that the number of EUV mask layers of N5P and 4nm will increase compared with 5nm.

TSMC announced in a recent earnings conference that the 3nm R&D progress is in line with expectations and will be another major process node. Compared with the 5nm process, the 3nm logic density can be increased by 70%, the computing performance can be improved by 15% at the same power consumption, and the power consumption can be reduced by 30% at the same computing performance. The number of EUV mask layers used in the 3nm process has exceeded 20 for the first time, and the industry estimates that it can reach up to 24 layers.

ASML CEO Peter Wennink pointed out in a recent earnings conference that the number of EUV mask layers used in the 5nm logic process will exceed 10, and the number of EUV mask layers used in the 3nm process will exceed 20. As the process shrinks, the number of EUV mask layers will increase significantly and replace the deep ultraviolet (DUV) multiple exposure process.

TSMC's 5nm and 3nm EUV mask layers have increased exponentially, and JDT, which provides EUV mask boxes (EUV Pods), has benefited the most. Its production capacity for this year and next year has been fully booked by major customers. As for the significant increase in EUV production capacity, Topco, which is the agent of EUV photoresist, has received brisk orders, and orders are also scheduled until the second half of next year.