We know that there are storage areas for various purposes in PLC, such as physical input and output area P, image input area I, image output area Q, bit storage area M, timer T, counter C, data area DB and L, etc. At the same time, we also know that each area can be measured by bit (BIT), byte (BYTE), word (WORD), double word (DWORD), or to specify the exact size. Of course, timer T and counter C do not have such a measurement system, they are only measured by bits. From this we can get that to describe an address, at least two elements should be included:
1. Storage area
2. Specific location in this area
For example: AQ2.0
A is the instruction symbol, and Q2.0 is the operand of A, that is, the address. This address consists of two parts:
Q: refers to the image output area
2.0: is the 0th bit of the second byte in the output area of this image.
From this, we conclude that an exact address should consist of:
〖Storage area symbol〗〖Storage area dimension symbol〗〖Dimension value〗.〖Digit value〗, for example: DBX200.0.
DBX200.0
Among them, we also call the two parts of "storage area identifier" and "storage area size identifier" as: address identifier. In this way, an exact address composition can be written as:
Address identifier + exact value unit
【The concept of indirect addressing】
Addressing is to specify the address where the instruction is to operate. The address method for the given instruction operation is the addressing method.
Before we talk about indirect addressing, let's take a brief look at direct addressing. Direct addressing, in simple terms, is to directly give the exact operand of the instruction. As mentioned above, AQ2.0 is direct addressing. For the instruction A, Q2.0 is the address it is going to operate on.
So indirect addressing is to give the exact operand of the instruction indirectly. Yes, that's the concept.
For example: AQ[MD100], AT[DBW100]. The content marked with square brackets [] in the program statement indirectly indicates the address to be executed by the instruction. MD100 and DBW100 in these two statements are called pointers. They point to the values contained in them, which are the exact location of the address area where the instruction is actually to be executed. Hence the name indirect.
Siemens indirect addressing methods include two types: memory indirect addressing and register indirect addressing.
【Memory Indirect Addressing】
The address format of memory indirect addressing is: address identifier + pointer. The value contained in the storage unit indicated by the pointer is the exact value unit of the address.
Memory indirect addressing has two pointer formats: single word and double word.
A single-word pointer is a 16-bit structure, from bit 0 to bit 15, indicating a value from 0 to 65535, which is the number of the addressed storage area.
The double-word pointer is a 32-bit structure. From 0 to 2 bits, a total of three bits, indicate the addressed bit number in octal, that is, 0 to 7; and from 3 to 18 bits, a total of 16 bits, indicate a value from 0 to 65535, which is the addressed byte number.
Pointers can be stored in the M, DI, DB and L areas, that is, the contents of these areas can be used as pointers.
There are significant differences in the use of single-word pointers and double-word pointers. The following examples illustrate:
LDW#16#35 //Store the 32-bit hexadecimal number 35 into ACC1
TMD2 //This value is then stored in MD2, which is a 32-bit bit storage area
L+10 // Store the 16-bit integer 10 in ACC1, and the 32-bit hexadecimal number 35 automatically moves to ACC2
TMW100 //This value is then stored in MW100, which is a 16-bit bit storage area
OPNDBW[MW100] //Open DBW10. Here [MW100] is a single word pointer, and the area storing the pointer is the M area.
The value 10 in MW100 is the address indirectly specified by the pointer, which is a 16-bit value!
--------
LL#+10 //Put 10 into ACC1 in 32-bit form. At this time, the content in ACC2 is: 16-bit integer 10
TMD104 //This value is then stored in MD104, which is a 32-bit bit storage area
AI[MD104]//Perform AND logic operation on I1.2!
=DIX[MD2]//Assign background data bit DIX6.5!
--------
ADB[MW100].DBX[MD2] //Read in DB10.DBX6.5 data bit status
=Q[MD2]//Assign value to Q6.5
--------
ADB[MW100].DBX[MD2] //Read in DB10.DBX6.5 data bit status
=Q[MW100] // Error!! There is no component Q10
-------------------------------------------------- --------------------------------------------------------
From the above series of examples, we can see at least one thing:
Single-word pointers are only used when the address identifier is non-bit. Indeed, as described earlier, single-word pointers determine the value of 0-65535, while for the specific bit structure of byte.bit, only double-word pointers can be used. This is the first difference between them. Another limitation of single-word pointers is that they can only address T, C, DB, FC and FB. In layman's terms, single-word pointers can only be used to refer to the numbers of these storage areas.
Compared with single-word pointers, double-word pointers do not have such limitations. They can address not only bit addresses, but also BYTE, WORD, and DWORD, and there is no area restriction. However, there are gains and losses. When addressing non-bit areas, it is necessary to ensure that 0-2 bits are all 0!
To summarize:
The memory indirect addressing of single-word pointer can only be used when the address identifier is non-bit; double-word pointer has no restrictions on address identifiers because it has a bit format. It is also because the double-word pointer is a pointer with bits, so when addressing the byte, word or double-word storage area address, it must be ensured that the content of the double-word pointer is 8 or a multiple of 8.
Now, let us analyze why AI[MD104] in the above example finally performs an AND logic operation on I1.2.
Through LL#+10, we know that the value stored in MD104 should be:
MD104: 000000000000000000000000000001010
When used as a double word pointer, the address to be operated by the final instruction should be determined according to 3-18 bits specifying the byte and 0-2 bits specifying the bit, so:
0000000000000000000000000001010=1.2
【Address register indirect addressing】
In the memory indirect addressing mentioned above, the indirect pointer is directly specified by M, DB, DI and L, that is, the content of the storage area pointed by the pointer is the exact address value unit to be executed by the instruction. However, in the register indirect addressing, the exact address value unit to be executed by the instruction is not the content of the storage area pointed by the register, that is, the register itself also indirectly points to the real address value unit. Siemens provides two ways to get the real address value unit from the register:
1. Indirect addressing of registers within the region
2. Inter-region register indirect addressing
The general format of address register indirect addressing is:
[Address identifier] [Register, P#byte.bit], for example: DIX[AR1,P#1.5] or M[AR1,P#0.0].
〖Register, P#byte.bit〗 are collectively called: register address pointer, and 〖Address identifier〗 is discussed in the previous post, which contains 〖Storage area identifier〗 + 〖Storage area size identifier〗. But here, the situation is different. Compare the previous example:
DIX[AR1,P#1.5]
X[AR1,P#1.5]
DIX can be considered as the address identifier we usually define. DI is the background data block storage area, and X is the size of this storage area, which refers to the bits in the background data block. But what about M in the following example? X only specifies the size of the storage area, so where is the storage area identifier? No doubt, in AR1!
In the example of DIX[AR1,P#1.5], the address area to be addressed has been determined in advance, and AR1 can only change the exact address value unit within this area, so we call it: intra-area register indirect addressing mode. Correspondingly, [AR1,P#1.5] here is called the intra-area addressing pointer.
In the example of X[AR1,P#1.5], the address area and the exact address value unit to be addressed are not determined in advance, only the storage size is determined. This means that we can address different address value units between different areas with a given area size, so it is called: inter-area register indirect addressing mode. Correspondingly, [AR1,P#1.5] here is called the inter-area addressing pointer.
Since there is a distinction between intra-area and inter-area addressing, the same AR1 can contain different contents, representing different meanings.
【AR format】
The address register is a special pointer area used for addressing. Siemens has two address registers: AR1 and AR2, each 32 bits.
When used in indirect addressing of registers within a region, we know that the content in AR at this time only indicates the numerical unit. Therefore, when indirect addressing of registers within a region is used, the content in the register is equivalent to the double-word pointer in the memory indirect addressing mentioned in the previous post, that is:
Bits 0-2 specify bits, bits 3-18 specify bytes, and bit 31 is always 0.
AR:
0000000000000BBBBBBBBBBBBBBBBXXX
This means that the value of AR can only be: 0.0-65535.7
For example: when AR=D4(hex)=00000000000000000000000011010100(b), it is actually equal to 26.4.
In inter-area register indirect addressing, since the area to be addressed must also be specified in AR, it is obvious that the content in AR at this time must be different from the requirements or regulations for the AR content when indirect addressing is performed within the register area.
AR:
10000YYY00000BBBBBBBBBBBBBBBXXX
Comparing the difference between the two formats, we find that the 31st bit is fixed to 1, while the 24th, 25th, and 26th bits have a range of values. You can definitely think that this is used to specify the storage area. Yes, the value of bit 24-26 determines the area to be addressed, and its value is defined as follows:
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