The role of DSP in 3G base stations is further enhanced

In response to the cost, processing power and flexibility requirements of 3G wireless infrastructure, Ericsson has moved to a DSP-only, software-defined approach to base station design. With this move, the leading base station manufacturer has revived the debate over the best combination of ASICs, FPGAs, DSPs and reconfigurable processors when developing advanced wireless systems.

With the TigerSharc TS-201 chip from Analog Devices, Ericsson hopes to adapt to the frequent changes in 3G standards through software upgrades, thereby improving system flexibility and reducing maintenance costs. The competitive situation between DSP, ASIC and FPGA has not changed much, but the rapid development of 3G standards has prompted Ericsson to re-evaluate the advantages and disadvantages of various architectures in terms of cost, power consumption, flexibility and processing power.

Last year, the industry released the latest W-CDMA enhancement standard Release 5 or High Speed ​​Downlink Packet Access (HSDPA), which caught many manufacturers who mainly develop base station equipment with ASICs off guard, pushing the flexibility issue to the forefront. In addition, Release 6 is being developed, so manufacturers are generally concerned about interoperability when launching systems. Many industry insiders predict that designers will be faced with the task of re-adjusting systems, and this work can only be done economically through software.

"But Ericsson also enjoys other benefits of DSPs," said Kevin Leary, wireless infrastructure product line manager at Analog Devices. These benefits include simplified board design, enhanced scalability (enabling design reuse), lower R&D costs, faster time to market, and lower inventory costs due to the use of a single processor.

Ericsson confirmed the deal with ADI but declined to disclose details or the value of the contract.

DSP-only base stations are not new, but so far they have been used mainly in the low-volume market, such as Siemens' development of a TI DSP-based base station for China's TD-CDMA market. Manufacturers of low-volume W-CDMA base stations also use DSP-only designs, such as Evolium, a joint venture between Fujitsu and Alcatel, which uses a design based on the ADI TS-201 chip.

Re-understanding

"But Ericsson's decision to adopt the TigerSharc chip will cause many companies to rethink DSPs," said Will Strauss, president and analyst at Forward Concepts.

Analog Devices has been trying to gain a foothold in the base station DSP market, and this design win is a great victory for it. According to Forward Concepts, the DSP supplied to the wireless infrastructure market in 2003 was worth $280 million, of which ADI accounted for 7.1%, ranking fourth, far behind Agere (33.9%), Motorola (28.6%) and TI (26.8%).

On the other hand, data from Bancorp Piper Jaffray shows that Ericsson dominates the $36 billion wireless infrastructure market with annual sales of $9.426 billion, followed by Nokia with $5.9 billion, Lucent, Motorola, Nortel Networks and other suppliers.

This design win also changed the competitive situation in the DSP market. With the help of major customers in the wireless infrastructure market, ADI will have a "firefight" with TI. "This is an infringement on TI's inherent territory (3G)," Strauss commented.

Since Ericsson will no longer use ASIC or FPGA to perform W-CDMA receiver processing, its decision will reduce the market share of ASIC and FPGA suppliers such as TI, Xilin and Altera. Strauss pointed out that Ericsson has always been a major customer of Xilinx.

Ericsson chose DSPs because it believes they can perform the intensive processing tasks that enable CDMA and W-CDMA systems to achieve multi-user and spectral efficiency. Until now, there have been two choices for performing intensive processing: a single DSP; a DSP + FPGA or a DSP + ASIC. "Reconfigurable processors are a third option, but what plagues them is the software," said David Squires, director of the DSP Center at Xilinx. He refers to the immaturity of development tools for such processors.

Observers say the ASIC remains the most efficient solution for intensive chip-rate processing tasks. "But it is also the least flexible and most expensive solution, and its rising costs are becoming prohibitive," said Tom Starnes, an analyst at Gartner Dataquest.

Strauss estimates that the average ASIC costs $10 million to develop.

"FPGAs offer greater flexibility and faster time to market, but you have to deal with higher silicon costs and power consumption," said Jeff Bier, general manager of Berkeley Design Technology Inc. (BDTI). VSPACE=12 HSPACE=12 ALT="Figure: Changing standards force OEMs to re-evaluate base station architecture">

"But those costs are continuing to decrease," Xilinx's Squires responded.

Programmable DSPs also provide flexibility, but as processing demands continue to increase, the processing capabilities of traditional DSPs have been overwhelmed.

"From an enterprise perspective, the first phase is always to try to get a foothold by launching a product first, so the initial solution is mostly DSP+FPGA," said Sandeep Kumar, strategic marketing manager for wireless infrastructure at TI. "But as the functions become more clearly defined, developers will move to DSP+ASIC or DSP+ASSP accelerator solutions."

Starnes pointed out that in order to stay ahead, DSP and RISC are adding many very useful features, including special instructions, accelerators and multiprocessors, and these advances even go beyond the higher performance that can be obtained by process upgrades.

BDTI's Bier brushed off the cost debate over ASICs, but Xilinx's Squires stressed that the debate is not limited to cost.

"In the past three years, the number of teams working on ASICs has been cut, which has reduced their design capabilities," Squires said. "In addition, OEMs have been forced to protect their own interests because they have found that ASICs are not necessarily worthwhile relative to the volume of infrastructure shipped."

Another factor that works against ASICs is their inherent inflexibility, which has become apparent with the development of 3G standards. Faced with high costs and changing standards, ASICs and FPGAs have had to give way to the evolving DSP architecture.

When ADI released the improved TigerSharc chip in 2003, it added up to 24Mb of IBM low-leakage embedded DRAM. In addition, ADI also improved the data path and enhanced the I/O structure. This memory-to-processing unit data transfer has become the main bottleneck of DSP architecture.

The most important evolution of the W-CDMA standard was the addition of CDMA-specific instructions to speed up chip-rate processing, which can eliminate the need for any coprocessors or ASICs in base stations, said Leary of Analog Devices.

"Because of the bit-oriented nature of CDMA chip-rate processing, you can really get a lot of efficiency if you optimize the processor for certain data types. That's what ADI does," said BDTI's Bier.

Leary also mentioned the TigerSharc chip's scalability and homogeneous programming architecture.

But Xilinx's Squires pointed out that if the code changes, the homogeneous processor approach will cause delays in the design, which in turn will affect verification. Squires recommends using a combination of FPGA and DSP so that the functions between modules can remain independent, thereby reducing mutual interference and time dependencies.

TI's Kumar said the company's ASSPs and ASICs have considerable flexibility to accommodate new standards, including HSDPA and Release 6.

But ADI's Leary counters: "ASSPs have limitations. You don't know how many times an ASSP can do filtering."

System interoperability issues are also becoming increasingly prominent. "CDMA2000 did not encounter this problem because Qualcomm controlled its development very well, but the situation with W-CDMA is different," said Leary. "Over time, operators and equipment vendors have to solve interoperability issues, so we will face the task of redesigning to ensure interoperability across the industry." In his view, this consolidates the position of software base stations.

But no one is saying that the days of hybrid processor solutions are over.

“For ADI, this is just a small victory in a small battle,” Bier said. “There is no reason to assume that DSP has won the day. As volumes increase and standards stabilize, the trend will be toward more customized solutions.”