A Design Scheme of Audio Processing System Based on ARM+DSP

With the rapid development of computer technology, electronic technology and communication technology, audio processing technology has also been widely used in many fields, such as mobile phones and IP phones in the communication field, MP3 and CD players in consumer electronics, and speech recognition and voice control systems in the control field [1]. In view of the powerful digital signal processing capabilities of DSP and the good real-time performance of ARM processor, combined with the interface characteristics of the audio codec chip TLV320AIC23, this paper describes the hardware interface design and software programming of the audio processing system composed of the three, and provides an effective and practical audio processing system solution.

TLV320AIC23 (AIC23 for short) is a high-performance stereo audio codec chip from TI. Its internally integrated analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) use multi-bit Sigma-Delta technology with oversampling digital interpolation filtering. The data transmission word length is 16, 20, 24, and 32 bits, and supports a sampling frequency range of 8kHz to 96kHz. The signal-to-noise ratio of the ADC and DAC reaches 90dB and 100dB respectively. The built-in headphone output amplifier supports both MIC and LINE IN input modes, and has programmable gain adjustment for both input and output. In addition, AIC23 has low power consumption, with power consumption of only 23mW in playback mode and less than 15uW in power saving mode. Therefore, AIC23 has become a popular choice for digital audio applications.

It is an ideal choice in the field [2] and plays an important role in a variety of digital products. Typical applications include audio encoding and decoding in mobile phones, MP3, and DV cameras.

TMS320VC5402 (VC5402 for short) is an excellent 16-bit fixed-point DSP from TI. It has fast computing speed and instruction execution speed of 100 MIPS. It has built-in memory and a variety of on-chip peripherals and is widely used in speech coding and communication fields [3].

S3C4510B (abbreviated as 4510B) is a low-cost, high-performance 16/32-bit reduced instruction set microcontroller from Samsung. Its excellent ARM 7TDMI core and general-purpose microprocessor macro unit make it an ideal choice for user-customized application development [4].

2 System Hardware Design

This audio processing system is mainly composed of the three processing chips mentioned above: ARM control unit, DSP signal processing unit and AIC23 audio acquisition unit. The system principle block diagram is shown in Figure 1.

Figure 1 Schematic diagram of an audio processing system based on DSP and ARM

AIC23 is a programmable chip with 11 16-bit registers inside. Programming these registers can obtain the required sampling frequency, input and output gain, and transmission data format. The control interface has two working modes, SPI and I2C, which are selected by the MODE pin on the chip: MODE=0 is I2C mode, and MODE=1 is SPI mode. Since ARM 4510B also has an I2C interface, I2C mode is selected. The I2C interface address of AIC23 is determined by the state of the pin. When =0, the address is 0011010, and when =1, the address is 0011011. Among them, SDIN and SDA are data lines, and SCLK and SCL are serial clock lines. VC5402 has two multi-channel buffered serial ports, and McBSP0 is selected to communicate with AIC23. The signal connection is shown in Figure 1. In the figure, AIC23 works in master mode, and the clock signal, DAC and ADC frame synchronization signals BFSX0 and BFSR0 are all provided by AIC23. The communication between DSP VC5402 and ARM 4510B is realized through the HPI interface on the DSP.

3. System software design

The system consists of two parts: the ARM system and the DSP system. ARM, as the main controller, manages the working process of the entire system, runs related applications, can schedule multiple tasks, and complete the communication with the external DSP system or other peripherals. The DSP mainly completes the collection and signal processing of audio data, and sends the processed data to the ARM for application calls. Such a design can greatly improve the working efficiency of the system, which is also a typical design solution for current embedded systems and various mobile handheld devices such as PDAs and mobile phones.

What needs to be done here is to program the control interface of AIC23 to make it work in the required mode. Then initialize the McBSP of DSP to perform AD, DA conversion and data processing.

3.1 ARM programming part

The programming of ARM in the system mainly involves initializing AIC23 to make it enter the normal working state and collect and process the audio data. This requires setting the special function registers of the I2C bus of 4510B: control status register IICCON, pre-scaling register IICPS and shift buffer register IICBUF. The register description is shown in Table 1[5].

Table 1 4510B I2C bus special function registers

0426095615522.jpg" target="_blank" style="color: rgb(8, 90, 153); font-family: Arial, tahoma, Verdana; font-size: 14px; line-height: 24px; ">

For a detailed description of the settings related to the 11 control registers of AIC23, see Reference 2. The settings here are: left and right channel line input muted; headphone left and right channel volume 6dB; DAC enabled, microphone volume 20dB as ADC input; ADC high-pass filter enabled; power supply enabled for all circuits of the chip; the chip works in master mode, the sampling data length is 16 bits, and the DSP data format is used (two data words follow the synchronization frame); sampling rate 88.2KHz (external crystal oscillator is 11.2896MHz); digital interface enabled.

The I2C bus timing when programming AIC23 is shown in Figure 2. After setting the I2C clock frequency, first send the start condition (when SCLK is high, SDI switches from high to low), then send the device address of AIC23, after the device address is sent, send the address of the corresponding register of AIC23, then send the data set for the register, and finally send the stop condition (when SCLK is high, SDI switches from low to high). Note that the register address here is 7 bits, the register data is 9 bits, and the I2C bus transmits data in bytes. Therefore, when programming the register of AIC23, the first byte includes the first 7 bits of the register address B15-B9 and the highest bit B8 of the set data, and the second byte is the last 8 bits B7-B0 of the set data.

Figure 2 I2C timing

3.2 Audio Data Collection and Playback

After initializing AIC23, DSP and McBSP0 are initialized, and then audio data is collected and played. Voice signals are collected through the microphone and output through the earphone after digital filtering. The receiving interrupt of McBSP0 is used to save data, and the audio data is processed through the FIR digital filtering subroutine. The program flow is shown in Figure 3.

Figure 3 Flowchart of audio data processing program

Initialize McBSP0 to coordinate with AIC23. Here, we need to configure the various control registers of McBSP0 according to the hardware design and software requirements. The main settings of the serial port in this system are: right-aligned received data with sign extension; receive interrupt enable; send and receive frame signals and send and receive clock signals provided by the chip; send and receive frame synchronization signals are valid at low level; sample send and receive data on the rising edge of the clock

Each frame sends and receives two 16-bit words of data[6].

The data receiving part can be implemented in the DSP interrupt program using the following statement:

mvkd drr10, *ar5 ; save data

pshd *ar5+% ; push data into the stack

popd new_ad ; Pop data from the stack to a custom register

The relevant procedures for FIR filtering are as follows:

ld new_ad, a; load new data into accumulator

stm #1,ar0; double operand increment

stm #N, bk; Set the length of the circular buffer, that is, the number of FIR filter stages (N is the number of filter stages)

stl a, *ar3+%; new data is sent to the buffer pointed to by ar3

ght: 24px; ">rptz a, #(N-1); Repeat the N-1 level multiplication and addition operation

mac *ar2+0%, *ar3+0%, a; ar2 is the coefficient pointer, the result is in the high bit of the accumulator

sth a, temp; save the calculation results

ld temp, a; the result is placed in the low bit of the accumulator...

stlm a, dxr10; send the data in the accumulator position to the serial port send register

…

Based on the above settings of AIC23 and DSP , a 21-level symmetrical FIR digital filter is used to filter the voice signal input through the microphone, and the filtering result is output by the earphone, with good actual effect. The collected audio data can also be transmitted to ARM through the HPI interface for application program call.

3.3 Speech Recognition Application Test

The basic principle of speech recognition is to extract features from speech signals. Currently, commonly used speech recognition algorithms include dynamic time warping (DTW) based on pattern matching, hidden Markov model (HMM) based on statistical models, and recognition methods based on neural networks (DNN, NPN, TDNN), etc. [7]. In order to facilitate system application testing, this paper uses the simplest method to debug the system, that is, the recognition of English vowels. The basic principle is to extract the frequency characteristics of vowel letters. Each vowel has three obvious resonance peak frequencies in its frequency domain response, and the easiest to identify is the first resonance peak, which can effectively recognize vowels. When extracting the frequency characteristics of the first resonance peak, the "zero crossing" method is used (counting the number of times a single frame signal waveform crosses the zero point - zero crossing rate), converting the analysis of the signal frequency characteristics into time domain analysis, and comparing the calculated zero crossing rate with the theoretical value to achieve vowel recognition. Figure 4 shows the time domain and frequency domain diagrams of the vowel "A" respectively.

Figure 4 Time domain and frequency domain diagrams of vowel A

The first resonance peak can be clearly seen from the frequency domain sampling diagram. At this time, the zero-crossing rate of the signal in the time domain sampling can be calculated to more accurately identify the vowel A. The sampling points that are approximately equal to zero in the calculation of the zero-crossing rate are usually weak interference and can be ignored. It has been verified that the recognition rate of this simple single vowel recognition method is above 80%, which proves the practicality of the audio processing of this system.

4 Conclusion

This paper describes the design and implementation of an audio processing system based on signal processing and embedded applications. The hardware design, software programming and application of the system are discussed. Through the control of the audio chip AIC23 by ARM and the communication between DSP and AIC23, the functions of audio signal acquisition, processing, output and simple speech recognition are realized. An application framework of the audio processing system based on ARM and DSP is constructed , which provides a practical hardware and software solution for further data processing, control applications, etc.

References

1 Zhang Dabo. Principles, Design and Application of Embedded Systems. Beijing: Machinery Industry Press, 2004.11

2 TLV320AIC23, Stereo Audio CODEC, 8- to 96-kHz, With Integrated Headphone Amplifier. Texas Instruments Incorporated, 2002

3 TMS320VC5402, Fixed-Point Digital Signal Processor. Texas Instruments Incorporated, 2000

4 S3C4510B User's Manual. Samsung Electronics, 2001

5 Li Juguang. Detailed Explanation of ARM Application System Development: System Design Based on S3C4510B. Beijing: Tsinghua University Press, 2004

6homa, Verdana; font-size: 14px; line-height: 24px; ">6 TMS320C54xx McBSP to TLV320AIC24 Interface. Texas Instruments Incorporated, 2003

7Huang Tao, Hu Bin. Design of non-specific speaker speech recognition based on SPCE061A single chip microcomputer. Microcomputer Information, 2006, 3-2: 19-20