As shown in Figure 5.4-6B, curve 1 is the characteristic curve of the ideal integration circuit, and curve 2 is the characteristic curve of the actual integration circuit. Characteristic curve 2 cannot maintain linear growth. After the output voltage UO reaches UOM (negative saturation value of the op amp output voltage), if U1 remains unchanged, the deviation between curve 2 and curve 1 becomes more and more serious, resulting in a large integration error, and even failure to work normally. Therefore, the basic integration circuit of Figure 5.4-6A can only work when the integration time is very short, which is not practical in practice. The main reason is the leakage of capacitor C2 and the input offset voltage and offset current of the op amp itself and the integral drift caused by its temperature drift. They are the same as the small input signal, and will be integrated, causing the output to gradually enter the saturation state. The practical integration circuit is shown in Figure 5.4-7A.
In the actual integration circuit, the balancing resistor RP=R1 is connected to the integration capacitor C2 in parallel with the resistor R2 to introduce DC negative feedback, which is the simplest and most effective way to suppress the integration drift caused by the offset voltage and offset current. However, R2 will affect the accuracy of integration, so the scope of application is limited to a certain extent.
For a practical integrator, the gain and bandwidth of the operational amplifier are limited. From the circuit in Figure 5.4-7A, we can get
Where T1 is the time constant of the integration circuit; TC is the time constant formed by the capacitor leakage; WO is the angular frequency of the main pole of the operational amplifier; AUO is the open-loop DC voltage gain of the operational amplifier.
The above formula is the product of four factors. The first factor represents the relationship between the output voltage and input voltage of the ideal integrator. Its amplitude-frequency characteristic curve is shown in characteristic curve 1 in Figure 5.4-7B. It is a straight line with an infinitely extended slope of -20DB/DEC at both ends. The second and third factors represent the leakage current and the low-frequency error caused by the limited gain of the operational amplifier. The fourth factor is the high-frequency error caused by the limited bandwidth of the operational amplifier.
As can be seen from Figure 5.4-7B, as long as TC", W1 is the normal working section of the actual integrator. Here WC=I/TC is the angular frequency of the pole determined by R2C2. The actual integration circuit working in the normal working section is almost ideal. Since the voltage gain AU (W) of the integration circuit decreases as the difference W increases, the integration circuit generally does not consider the problem of high-frequency interference.
Figure 5.4-8 shows the step response of the actual integrator circuit. The long-time characteristic reflects the response of the integrator circuit to a slowly changing signal. Figure 5.4-8A shows that the longer the integration time, the greater the error. This is due to the limited leakage current of the AUO. The short-time characteristic reflects the response of the integrator circuit to a fast change. Figure 5.4-8B shows that the response of the actual integrator circuit has a time lag of 1/AUOWO compared to the ideal response, which is caused by the limited bandwidth of the op amp.
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