Wafer-level radio frequency (RF) testing of IC chips

For ultra-thin dielectrics, the oxide capacitance (Cox) cannot be directly extracted by standard IV and CV tests due to large leakage and nonlinearity. However, using high-frequency circuit models allows accurate extraction of these parameters. As the industry moves toward 65nm nodes and below, the challenges in this regard are increasing for devices in high-performance/low-cost digital circuits, RF circuits, and analog/mixed-analog circuits.

Recommendations to reduce the use of RF technology are made under the following specific assumptions: It is assumed that RF technology cannot be effectively applied, especially in a production environment, which has indeed been the case in the past.

However, new parameter test systems can now extract RF parameters quickly, accurately, and repeatably, almost as easily as DC testing. Most importantly, complete RF testing has been achieved through automatic calibration, de-embedding, parameter extraction based on the characteristics of the device under test (DUT), and automatic adjustment of probe contact characteristics. This development eliminates the need for RF experts to ensure good test results. In production laboratories, automatic probe stations and test controllers can accomplish things that used to require human intervention based on intermediate test results or operational needs. Seven semiconductor companies around the world have verified this system for wafer RF production testing.

RF Test Applications

Whether you are producing RF chips for mobile phone accessories from III-V cluster wafers or high-performance analog circuits using silicon technology, predicting the performance and reliability of the final product in R&D and production requires the measurement of wafer-level RF scattering parameters (s). These tests are an important complement to DC data, providing significantly more information with fewer tests than pure DC tests. In fact, a two-channel S-parameter scan can extract both impedance and capacitance parameters, while conventional DC methods require separate tests and even separate structures to isolate the information needed for process control.

Functional testing of power amplifier RF chips is another application of this performance. These devices are very complex, yet their prices fluctuate widely. The high frequency and low voltage test conditions in production eliminate the power consumption issues that usually hinder wafer-level testing. There is also no expensive packaging of defective devices. Known good chip technology can also be applied to wafer-level testing, which can significantly improve the yield of modules using RF chips.

Chip manufacturers can also use wafer-level RF testing to extract quality factors of various high-performance analog and wireless circuits, such as filters, mixers, and oscillators. SoC (System-on-chip) device manufacturers hope that this sub-circuit testing technology can reduce overall testing costs.

Characterizing the equivalent oxide thickness (EOT) of thin SiO2 and high-k gate dielectrics is critical for high-performance logic devices below the 130nm node. RF testing plays an important role in accurately modeling the dielectric layer, removing parasitic elements that would otherwise prevent the correct representation of CV data in traditional binary models. Medium- and high-frequency (MFCV, HFCV) capacitance measurement techniques do not introduce series impedance to the test due to the instrument.

Challenges of Standard IV/CV Testing

The simulation models used by design engineers during the product development phase include RF parameters and IV/CV data extracted from s-parameter data. Advanced design tools require statistical models, not a single set of parameters. This makes it possible to optimize yield and functional characteristics. If IV and CV parameters are based on statistical results, but RF is not, then the model is non-physical and unreliable.

In some cases, such as inductance, IV and CV information are of limited value. However, Q is of high value as a parameter for inductance characterization and control at the frequencies of use. The challenge with IV and CV testing is to understand when it is the primary characterization of the product and when it is not. The only characterization parameters for many analog and wireless device characteristics are Ft and Fmax. Ideally, they are RF parameters that need to be measured and extracted in use cases other than the 3rd harmonic. For digital and memory products, IV and CV are valuable measurements for both active and passive devices as long as the device model is kept simple. As mentioned earlier, the measurement of gate dielectrics has a complex CV model.

Concerns about using RF/RF CV

Unreliable testing can hinder production management. A bad measurement of a good device is called an alpha error. In production, this can mean that a wafer is mistakenly scrapped. Misleading ITRS information, along with the slow, painstaking process many companies experience in their prototyping labs, combine to make engineers reluctant to adopt production RF test, which they believe will have a high alpha error rate.

It was also realized that throughput and operating costs would be unacceptable, and a high level of technical support would be required to interpret the measurement results. The lack of reliable calibration and repeated testing due to contact resistance issues contributed to the low throughput of early RF systems. The calibration of the old system was not valid for different measurement frequency configurations. High operating costs were also related to manually testing gold standard calibration plates, which used soft pads and expensive RF probes that quickly broke due to over-scratching, which greatly increased the cost. There was also a misconception in the market that wafer-level S-parameter testing required specialized probes and chucks.

Aspects of RF testing in production that require additional attention:

● A large number of test structures need to be changed.

● Results are unstable and vary with equipment, people, and time.

● RF experts must take care of each device.

● Different batches may require completely different processing and operating procedures.

● Doubtful if this can become a real-time technology.

● Laboratory-level results are unreliable.

Based on these insights, fabs still maintain the status quo, designing and developing RF chips, new gate materials and other advanced devices like "blind flies". The result is the interaction between design and process, which greatly increases the cost and time to market, accompanied by lower initial yields.

Production Solutions

The key to making wafer-level RF test a production process control tool is full automation of the test. This means that robots move wafers, calibration standards, and probe cards to where they are needed. In other words, a major goal when designing a test system is data integrity without human intervention.

Today's third-generation testers have this test capability up to 40 GHz. Unlike laboratory instruments, these testers designed specifically for mass production environments support upgrades from 6 to 65 GHz, depending on the application. The third-generation testers are required to automatically perform parasitic removal and select tests based on DUT characteristics, which are the main technical challenges in obtaining reliable Cox, Fmax and Q values. These algorithms, coupled with improved interconnect technology and automated calibration processes, make it possible to quickly and accurately extract RF parameters from S-parameter tests.

Precise parasitic removal includes correcting for random measurement artifacts. For example, in a system with a characteristic impedance of 50Ω, any variation in contact resistance will limit the repeatability of the measurement. Equipment manufacturers must identify all sources of instability in RF testing so that they can be eliminated in a targeted manner when designing the measurement system. Innovative designs for system interconnects improve the repeatability of connections between key components in the system.

In order to ensure the repeatability of the measurement, equipment manufacturers should also pay attention to other aspects such as: measurement automation, correction of probe contact impedance, adjustment of probe deformation (overdrive), and initialization of probe cleaning. Controlling the deformation of the probe and cleaning the probe when necessary will significantly extend the life of the probe, which will reduce the main consumables cost (each RF probe is worth about $1000). This should also be part of the statistical process control of the test machine.

With a stable and known error distribution and uncertainty characteristics, the Smith curve derived from the collected data will not have non-physical artifacts; it is no longer necessary for experts to analyze and interpret these results. In the old system, RF test experts need to monitor the data (track the curves of each test series, etc.), look for strange or unexpected measurement results, and then analyze these results to confirm that they represent process changes rather than measurement anomalies.

Third-generation parametric testers make continuous monitoring of RF measurements a reality through improved logic, reducing or even eliminating the need for RF expert technical support. Using these systems, operators at the production level can obtain repeatable, real-time measurements across a large number of products and production equipment. RF testing is almost as easy as DC testing, and it has become a must for fully characterizing wafer devices. In fact, a third-generation system can perform both DC and RF testing (see "Innovative Design for RF Testing"). The system includes many other improvements to increase throughput and make it more practical for high-volume wafer-level testing for process monitoring. These features accelerate measurement work in the modeling lab without compromising the lab-quality measurement results, thereby shortening R&D cycles and time to market. All of this can be achieved through a simple system upgrade without the need to purchase a dedicated probe station. When the calibration specifications are stored in the probe station, the operation process is the same as that of pure DC testing, and only changes are made during periodic equipment maintenance.