ADC and RF devices that meet the dynamic performance requirements of high-performance digital receivers

　　Many digital receivers have high requirements for the dynamic performance of the high-performance ADC and analog devices they choose. For example, cellular base station digital receivers require sufficient dynamic range to handle larger interference signals and thus demodulate lower-level useful signals. Through Maxim's 15-bit 65Msps analog-to-digital converter MAX1418 or 12-bit 65Msps analog-to-digital converter MAX1211 with 2GHz MAX The 9993 or 900MHz MAX9982 integrated mixer can provide excellent dynamic characteristics for the two key circuits of the receiver. , In addition, Maxim's intermediate frequency (IF) digital variable gain amplifier (DVGA) MAX2027 and MAX2055 can also provide a higher third-order output intercept point (OIP3) in many systems to meet the gain adjustment range required by the system.

　　1 System structure of undersampling receiver

　　Cellular base stations (BTS: base transceiver stations) usually consist of multiple different hardware modules, one of which is the transceiver (TRx) module that performs RF reception (Rx) and transmission (Tx) functions. In old analog AMPS and TACS BTS, one transceiver can only handle one full-duplex Rx and Tx RF carrier, so many transceivers are needed to provide enough carriers. Today, analog technology has been replaced by CDMA and WCDMA globally, and Europe also adopted GSM 10 years ago. In CDMA, multiple calling users can use the same RF frequency, so a transceiver must process the signals of multiple calling users at the same time. There are currently a variety of CDMA and GSM design solutions, and BTS manufacturers have been committed to exploring ways to reduce costs and power consumption. Optimizing single-carrier solutions or developing multi-carrier receivers are effective solutions. Figure 1 is a structural block diagram of an undersampling receiver commonly used in BTS equipment.

　　In Figure 1, MAXIM's 2gHz Max 9993 and 900MHz Max9982 mixer can provide the required gain and linearity for many designs, and have extremely low coupling noise, so that those desrsized mixed frequency that is highly lost is no longer required device. The MAX2027 and MAX2055 work at the first and second intermediate frequency stages of the receiver respectively. The OIP3 of these two devices can reach +40dBm within their entire gain adjustment range. The data converters in Figure 1 use the MAX1418 (15-bit, 65Msps) and MAX1211 (12-bit, 65Msps). In fact, Maxim's other sample-rate data converter devices can meet most design requirements. If the second downconverter in Figure 1 is omitted (shown in the dotted line), then the circuit shown in Figure 1 becomes a single downconverter structure.

　　2 High-performance device recommendations

　　2.1 Low-noise ADC device MAX1418

　　The undersampling receiver structure shown in Figure 1 has strict requirements on the noise and distortion of the ADC. In the receiver, the useful signal with a lower level is digitized alone or is accompanied by a useless large-amplitude signal that requires double attention. Therefore, in order for the receiver to work properly, the effective noise figure of the ADC must be based on these two signals. Calculate the extreme situation (that is, the useful signal is the minimum and the useless signal reaches the maximum). For smaller analog input signals, the thermal noise and quantization noise that dominate the ADC's noise floor determine the ADC's noise figure (NF).

　　The MAX1418 series products are particularly suitable for baseband applications when fINPUT < fCLOCK/2. When the converter operates in this frequency band, these devices with excellent baseband characteristics will have the best dynamic range, including the MAX1419 for 65Msps clock rate and the MAX1427 for 80Msps clock rate. Their baseband SFDR (spurious-free) dynamic range ) can reach 94.5dBc.

　　In fact, MAX1418 can also work with 14-bit interface devices. At this time, the SNR will be slightly lost, while the SFDR will not be affected.

　　When the front-end gain of the ADC is 36dB, the single-tone blocking level at the antenna end exceeding -30dBm will exceed the input range of the ADC. According to the CDMA2000 cellular base station standard, the maximum blocking level allowed at the antenna end is -30dBm. At this time, the front-end gain needs to be reduced by 6dB. In this way, the maximum blocking signal allowed to be added to the ADC is within the margin allowed by the standard specification. Probably bigger. Assuming a 2dB margin, reducing the front-end gain by 6dB will cause the maximum blocking level at the antenna end to become -26dBm and the maximum allowed input signal of the ADC to +4dBm. That is to say, when single-tone blocking occurs, the total interference (noise + distortion) allowed by the cellular standard will deteriorate by 3dB relative to the reference sensitivity, and how this 3dB is allocated between noise and distortion is a question that designers must consider .

　　2.2 MAX1211 converter using primary down-conversion structure

　　If sufficient SNR and SFDR indicators can be obtained in the higher IF section, then the undersampling circuit can be used in the primary down-conversion structure. Maxim's MAX1211, 12-bit, 65Msps converter is designed using this structure. Its pins are compatible with the upcoming 80Msps and 95Msps converters. This series of devices can operate at frequencies up to 400 MHz input IF signal is directly sampled. , In addition, it also has other advanced features, such as the clock input can be a differential signal or a single-ended signal, and the clock duty cycle can be adjusted between 20% and 80%. In addition, MAX1211 is also designed with a data valid indicator (to simplify clock and data timing), and uses a small 40-pin QFN (6 x 6 x 0.8mm) package, two's complement and Gray code digital output formats. ??? Compared with the double frequency conversion structure, the primary converter has obvious advantages. Since the second-stage down-conversion mixer, second-stage IF gain circuit and second-stage LO synthesizer are omitted, the number of components and circuit board space can be reduced by about 10%, and the cost will also be greatly reduced.

　　2.3 IF amplifier MAX2027 and MAX2055

　　MAXIM also provides digitally controlled gain, high-performance IF amplifiers with 1dB increments per stage. Among them, the MAX2027 digitally controlled gain amplifierDVGA adopts single-ended input/single-ended output mode and can work in the frequency range of 50MHz to 400MHz. Its noise figure at maximum gain is only 5dB. The MAX2055 is a single-ended input/differential output DVGA that can drive high-performance ADCs in the frequency range of 30MHz to 300MHz. A step-up transformer can be used to provide differential drive between the differential output of the MAX2055 and the differential input of the ADC, which is beneficial to the balance between the output signals. These two DVGAs typically operate at 5V bias and can achieve an OIP3 of +40dBm over the entire gain setting range.

　　2.4 High linearity mixers MAX9993 and MAX9982

　　In receiving circuits, mixers often bear larger input signals with stricter performance requirements. Ideally, the output signal amplitude and phase are proportional to the input signal amplitude and phase, and this ratio has nothing to do with the LO signal. Therefore, the mixer's amplitude response is linear with the RF input and is independent of the LO input signal.

　　However, the nonlinearity of the mixer will also produce some undesirable mixing signals, called spurious responses. These spurious signals are responses in the IF band caused by the clutter signals arriving at the RF port of the mixer. Useless spurious signals will interfere with the operation of useful RF signals. The IF frequency of the mixer can be given by the following formula:

　　fIF = ±mfRF ±nfLO

　　Here, fIF, fRF and fLO are the signal frequencies of their respective ports, and m and n are the harmonic orders after mixing the fRF and fLO signals.

　　MAXIM's integrated (or active) balanced mixers MAX9993 and MAX9982 have attracted much attention due to their superior performance to passive mixing solutions. When m or n is an even number, the balanced mixer can suppress certain spurious responses. An ideal double-balanced mixer can reject all responses where m or n (or both) are even numbers. In a double-balanced mixer, the IF, RF and LO ports are all isolated from each other. A properly designed balun allows the mixer to overlap in the IF, RF and LO frequency bands. Features of the MAX9993 and MAX9982 include low noise figure, built-in LO buffer, low LO driver, LO switch allowing two LO inputs, excellent LO noise characteristics, and more. In addition, there are RF baluns at the RF and LO ports.

　　Since these MAXIM mixers are embedded with LO buffers with excellent LO noise performance, the requirements for the LO power supply are reduced. Typically, LO noise mixed with higher-level input blocking signals reduces receiver sensitivity, but the MAX9993 and MAX9982 include low-noise LO buffers that reduce the impact on receiver sensitivity when blocking occurs. For example, assume that the sideband noise of the VCO input signal is -145dBc/Hz, and the typical LO noise characteristic of the MAX9993 is -164dBc/Hz. In this way, the composite sideband noise only drops by 0.05dB. c/Hz to -144.95dBc/ Hz. Using this method, the user only needs to provide a lower-level LO signal to the mixer to ensure that the mixing characteristics of the receiver are not degraded by the performance of the MAX9993's built-in LO buffer.

　　In addition, there is a tricky second-order spurious response, also known as the half-IF (1/2IF) spurious response. For low-end injection, the mixer order is: m = 2, n = -2; for high-end injection, the mixer order is: m = -2, n = 2. When low-end is injected, the input frequency that causes the half-IF spurious response is fIF/2 lower than the desired RF frequency. Figure 2 shows the specific locations of the useful fRFfLOfIF and useless fHalf-IF frequencies. In fact, the desired RF frequency is a mixture of 1909MHz and 1740MHz LO frequency, and the resulting IF frequency is 169MHz. Although the RF and IF carrier bandwidth of CDMA is 1.24MHz, it is expressed here as a single-frequency signal with the frequency as the center carrier frequency. In this example, the unwanted signal at the frequency of 1824.5MHz caused the spurious component of the half-IF of 169MHz. because:

　　2fHalf-IF - 2fLO = fIF

　　Therefore, it can be obtained: 2×1824.5MHz-2×1740MHz=169MHz

　　In general, the total amount of suppression (also called 2×2 spurious response) can be predicted based on the mixer's second intercept point IIP2. Figure 3 shows the 2×2 IMR or spurious value of MAX1993. The signal levels in the graph are the mixer input levels calculated using the input IP2 (IIP2) performance. The specific calculation formula is as follows:

　　IIP2 = 2 × IMR + PSPUR = IMR + PRF

　　＝2×70dBc+-75dBm＝70dBc+-5dBm

　　=+65dBm

　　Since the typical spurious response 2RF-2LO provided by MAXIM's MAX9982 900MHz active filter is 65dBc, its IIP2 is calculated as follows:

　　IIP2 = 2 × IMR + PSPUR = IMR + PRF

　　＝2×６６ｄＢ＋＋－７0ｄＢｍ＝６５ｄＢ＋＋－５dBm

　　=+60dBm

　　3 Conclusion

　　When the receiver gain requirement is not high, MAXIM's 15-bit ADC chip MAX1418 has excellent noise performance, so it can withstand larger blocking levels or interference levels with the smallest AGC. The MAX1211 ADC series products are suitable for primary frequency conversion receiving structures, and their first IF input frequency can reach 400MHz. In addition, the MAX9993 and MAX9982 mixers provide the required linearity, low noise figure, and high power gain, thus eliminating the need for passive filters in the receiver design process. The typical OIP3 value of the MAX2027 and MAX2055 DVGA is approximately +40dBm over the entire gain-adjustable range. Receivers composed of these components can take the performance of low-cost solutions to the next level.