PLL-VCO Design and Fabrication Part 2

Design of VCO Circuit
The VCO circuit uses the Kulap oscillator circuit introduced in the remarks column of the previous chapter.
The coil and capacitor are combined to achieve the design specification of 40M~60MHz.
The coil is FCZ50-10S. The standard inductance of this coil is 0.68μH, but the core is slightly adjusted to reduce the inductance.
The combined variable capacitor diode is 1SV161. Figure 6 shows the VR-C characteristics of the voltage applied to 1SV161: capacitance. 1SV161 is used for electronic tuning of CATV tuners, and its capacitance change ratio is Cmin (VR=2V)/Cmax (VR=25V)=10.5. The control voltage (reverse voltage VR) of the variable capacitor used here is in the range of 1~8V.

(In order to be able to set the resonant frequency over a wide range, a variable capacitance diode with a relatively large capacitance is selected. When the frequency range is several MHz, the capacitor in series can be changed from 1000pF to 100pF.)

Production and adjustment of PLL-VCO substrate
Figure 7 shows the produced PLL-VCO printed circuit substrate. Figure (a) is the parts arrangement diagram, and Figure (b) is the printed circuit substrate pattern. PLL IC, VCO, and buffer amplifier are arranged on a printed circuit substrate.
Since the PLL IC generates noise from the digital circuit, the PLL part and the VCO circuit and buffer amplifier should be made using separate substrates; however, they are mixed on one substrate in this case.
On this substrate, the PLL IC is separated from other high-frequency circuits using ground copper foil, and the power supply is also made into separate systems to reduce the influence of the digital circuit.
The copper foil of the VCO circuit and the buffer amplifier circuit also uses a slightly thicker pattern.
The adjustment steps are as follows.
▲PLL Lock
The PLL-VCO circuit is in a feedback-controlled state, which is called lock. First, assume that the display of the digital setting SW is "5000". At this time, if the PLL is locked, the LD terminal (28 terminal) of the MC145163P will become "H" output, and the LED will light up. Production and adjustment of PLL-VCO substrate
Figure 7 shows the produced PLL-VCO printed circuit substrate. Figure (a) is a parts configuration diagram, and Figure (b) is a printed circuit substrate pattern. PLL IC, VCO, and buffer amplifier are arranged on a printed circuit substrate.
Since the PLL IC generates noise from the digital circuit, the PLL part and the VCO circuit and buffer amplifier should be made using separate substrates; however, they are mixed on one substrate here.
On this substrate, the PLL IC is separated from other high-frequency circuits using grounding copper foil, and the power supply is also made into a separate system to reduce the influence of the digital circuit.
The copper foil of the VCO circuit and the buffer amplifier circuit also uses a slightly thicker pattern.
The adjustment steps are as follows.

Figure 7 PLL-VCO circuit printed circuit board
(Digital circuit and similar circuit (high frequency) are mixed together,
but the two are separated by copper foil layout design. The signal line is surrounded and isolated by ground copper foil.)
If the lock state is deviated, the LD terminal will become "L" pulse output, so the LED will be slightly dimmed. In the deviated lock state, the cores of coils T1 and T2 can be slightly adjusted to achieve the lock state.
Next, as shown in Figure 8, use a high-frequency test bar to detect the voltage of the output terminal, and then adjust the core of T2 to maximize the voltage. This high-frequency test bar can be made in Chapter 8.
▲ Oscillation frequency range adjustment
This is an adjustment example for an oscillation frequency range of 45M~55MHz. Set the digital setting SW to "4500" and adjust the core of T1 so that the voltage Vr of the variable capacitance diode becomes 2V.
Next, set the digital setting SW to "5500" and confirm whether Vr becomes 4~6V.
Figure 9 shows that a 470Ω load is connected, the resonance point of T2 is adjusted to 52MHz, and the voltage and frequency changes of the variable capacitance diode are observed. Even if the oscillation frequency of the VCO changes from 38M to 68MHz, the frequency will be locked.
In fact, the oscillation frequency is used within 10MHz to make T2 resonate at the center frequency.
PLL circuits are widely used in AV products. In addition, due to the LSIization of PLL circuits, the circuit is very simple to make. The MCl45163P used here is one of the more easily available PLL ICs.

Figure 9 Relationship between voltage, frequency, and output voltage of a variable capacitance diode
(The change in output voltage is affected by the resonant characteristics of T2. By changing the combination of T2 and 10pF, the lower the Q value of the resonant circuit, the flatter the output voltage will be.)