Design of RF voltage-controlled oscillator based on accumulation-type MOS varactor

Publisher:静静思索Latest update time:2010-08-16 Source: 今日电子 Reading articles on mobile phones Scan QR code
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introduction

With the development of mobile communication technology, the research of radio frequency (RF) circuits has attracted widespread attention. Using standard CMOS technology to implement voltage-controlled oscillators (VCOs) is the key to realizing RF CMOS integrated transceivers. In the past, most VCO circuits used reverse-biased varactor diodes as voltage-controlled devices. However, when the circuit was implemented using actual technology, it was found that the quality factor of the varactor diode was usually very small, which would affect the performance of the circuit. Therefore, people tried to use other devices that could be implemented using CMOS technology to replace general varactor diodes, and MOS varactor tubes came into being.

MOS Varactor

Short-circuiting the drain, source and substrate of a MOS transistor can form a simple MOS capacitor, whose capacitance value changes with the voltage VBG between the gate and the substrate. In a PMOS capacitor, an inversion carrier channel is established when VBG is greater than the absolute value of the threshold voltage. When VBG is much greater than the absolute value of the threshold voltage, the PMOS capacitor operates in a strong inversion region. On the other hand, when the gate voltage VG is greater than the substrate voltage VB, the PMOS capacitor operates in the accumulation region, where the interface voltage between the gate oxide layer and the semiconductor is positive and allows electrons to move freely. In this way, the PMOS capacitance value Cmos in the inversion region and the accumulation region is equal to Cox (oxide layer capacitance).

There are three working regions between the strong inversion region and the accumulation region: the medium inversion region, the weak inversion region and the depletion region. There are only a few mobile carriers in these working regions, which reduces the Cmos capacitance value (smaller than Cox). At this time, Cmos can be regarded as a series connection of the parallel capacitance of Cox and Cb and Ci. Cb represents the closed loop of the depletion region capacitance, and Ci is related to the change in the number of holes at the gate oxide interface. If Cb (Ci) is dominant, the PMOS device works in the depletion (medium inversion) region; if neither capacitor is dominant, the PMOS device works in the weak inversion region. The curve of Cmos capacitance value changing with VBG is shown in Figure 1.

Modulation characteristic curve of pmos capacitor with b=d=s
Figure 1 Modulation characteristic curve of PMOS capacitor with B=D=S

The channel parasitic resistance value of PMOS working in the strong inversion region can be obtained by the following formula:

(1)

Where W, L and kp are the width, length and gain factor of the PMOS transistor respectively. It is worth noting that as VBG approaches the absolute value of the threshold voltage, Rmos gradually increases, and when VBG equals the absolute value of the threshold voltage, Rmos is infinite. This formula is based on the simplest PMOS model. In fact, as the hole concentration steadily decreases, Rmos will maintain a finite value throughout the inversion region.

Inversion and accumulation MOS varactors

Through the above analysis, we know that the tuning characteristics of ordinary MOS varactor are non-monotonic. There are currently two methods to obtain monotonic tuning characteristics.

One approach is to ensure that the transistor does not enter the accumulation region over a wide range of VG variations. This can be accomplished by disconnecting the substrate from the gate-source junction and shorting it to the highest DC voltage in the circuit (e.g., the supply voltage Vdd).

FIG. 2 is a comparison of the Cmos-VSG characteristic curves of two MOS capacitors of the same size.

Modulation characteristic curve of inversion MOS capacitor
Figure 2 Modulation characteristic curve of inversion MOS capacitor

It is obvious that the tuning range of inversion MOS capacitors is wider than that of ordinary MOS capacitors, as the former only works in the strong, medium and weak inversion regions and never enters the accumulation region.

A better method is to use MOS devices that only work in the depletion region and accumulation region, which will bring a larger tuning range and lower parasitic resistance, which means a higher quality factor. The reason is that the electrons in the depletion region and accumulation region are majority carriers, and their mobility is about three times higher than that of holes. To obtain an accumulation-type MOS capacitor, it is necessary to ensure that the strong inversion region, the medium inversion region and the weak inversion region are prohibited, which requires suppressing any hole injection into the MOS channel. The method is to remove the p+ doping of the drain-source junction in the MOS device, and at the same time make an n+ doped substrate contact at the original drain-source junction position, as shown in Figure 3.

Accumulation-type MOS capacitor cross-section diagram

Figure 3. Schematic diagram of the cross section of an accumulation-type MOS capacitor

This will reduce the parasitic resistance of the n-well to a minimum. The tuning curves of the accumulation MOS capacitor and the ordinary MOS capacitor are shown in FIG4 .

Modulation characteristic curve of accumulation type MOS capacitor
Figure 4 Modulation characteristic curve of accumulation-type MOS capacitor

It can be seen that the accumulation type MOS capacitor has good monotonicity. It is worth noting that no additional process flow is introduced in the process of designing the accumulation type MOS capacitor.

Design and Simulation Results

Circuit diagram of VCO
Figure 5 VCO circuit diagram

The VCO circuit structure used by the author is shown in Figure 5. This is a standard symmetrical CMOS structure. The two varactors are symmetrically connected, which reduces the influence of the potential change on the capacitance value of the varactor when the two ends oscillate, and improves the spectrum purity. In order to ensure good matching, the inductor should be connected with the same dual inductor symmetrically. In addition, since the LC oscillation circuit is composed of two very large on-chip integrated inductors and two equally large accumulation-type MOS varactors, the high loss makes the quality factor low, which requires a large negative transconductance to maintain the continuous oscillation; and the absolute value of the equivalent negative transconductance must be larger than the transconductance required to maintain the equal amplitude oscillation to ensure the start-up, so the two pairs of coupled transistors need to be set with a larger width-to-length ratio, but the large width-to-length ratio also brings a large parasitic effect, which affects the phase noise and tuning range. Finally, two NMOS transistors are used at the bottom to form a negative resistance to compensate for the loss of the VCO. According to the small signal model analysis, ignoring various parasitic and high-order effects, the absolute value of the equivalent negative resistance RG can be estimated as (assuming that the transconductances of the two active devices are gM1 and gM2 respectively):

(2)

The top PMOS transistor provides the bias current, and this structure requires a very low supply voltage.

The entire design is based on TSMC's 0.35μm germanium silicon RF process model PDK, with a total of three layers of metal. Among them, the inductor is a planar spiral octagon, wound by the top metal. Select the inductance value of 0.6nH, then the total capacitance can be determined when the oscillation frequency is selected. The capacitance components in the LC oscillation loop include the parasitic capacitance of the inductor (very small), the drain-substrate capacitance of the NMOS transistor, the gate-drain capacitance, the gate-source capacitance and the most important accumulation MOS capacitance. In order to obtain a larger tuning range while ensuring oscillation, the proportion of the last item must be as large as possible.

Tuning curve of vco
Figure 6 VCO tuning curve

Finally, the power supply voltage used was 1.5V, and the power consumption was about 10mW. The tuning curve obtained by simulation using SpectreRF under the Cadence platform is shown in Figure 6. When the control voltage changes from 0 to 2V, the oscillation frequency changes between 3.59 and 4.77GHz, the center frequency is 4.18GHz, and the tuning range is about 28%. The phase noise curve at the center frequency is shown in Figure 7. At this time, the control voltage is 0.75V, and the phase noise corresponding to the offset of 600kHz is -128dB/Hz.

Phase noise curve of vco
Figure 7 VCO phase noise curve

When the control voltage changes from 0.75V to 2V, the oscillation frequency changes to 4.77GHz and the phase noise changes to -135dB/Hz, which is 7dB lower. This is caused by two reasons. First, the total capacitance of the LC oscillation circuit decreases and the oscillation frequency increases, which reduces the negative transconductance required to maintain the oscillation. However, because the negative transconductance provided by the two NMOS transistors remains almost unchanged, the stable oscillation amplitude increases and the phase noise decreases. On the other hand, the channel parasitic resistance of the accumulation MOS capacitor in this process decreases as the voltage increases, thereby reducing the loss and the phase noise.

Compared with the VCO designed with inversion MOS varactor, the channel parasitic resistance of the accumulation MOS capacitor is lower than that of the inversion MOS capacitor due to the higher mobility of electrons, which means that the accumulation MOS capacitor has a higher quality factor, resulting in an improvement in the overall performance of the VCO, especially a reduction in phase noise. The comparison results are shown in Table 1. Considering factors such as process and power consumption, the use of accumulation MOS capacitors has greater advantages.

Table 1 Performance comparison of two MOS capacitor VCOs
Performance comparison of two MOS capacitor VCO

in conclusion

Based on 0.35μm technology, considering low voltage and low power consumption, a VCO with an operating frequency of 4.2GHz is designed, and the accumulation MOS capacitor and the inversion MOS capacitor are used for tuning in the circuit. The simulation results show that the tuning range and center frequency of the two VCOs are almost the same. When the power consumption is about 10mW, the accumulation MOS tuned VCO shows better phase noise performance.

Reference address:Design of RF voltage-controlled oscillator based on accumulation-type MOS varactor

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