How to Design a Programmable Gain Instrumentation Amplifier for Wideband Precision Signal Chains

Publisher:EE小广播Latest update time:2022-11-25 Source: EEWORLDAuthor: ADI系统应用工程师Maithil Pachchigar和ADI产品应用工程师John Neeko Keywords:Broadband Reading articles on mobile phones Scan QR code
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How to Design a Programmable Gain Instrumentation Amplifier for Wideband Precision Signal Chains


Precision data acquisition subsystems are typically composed of high-performance discrete linear signal chain blocks for measurement and protection, conditioning and acquisition, or synthesis and driving. When hardware designers develop these data acquisition signal chains, they typically require high input impedance to directly interface with a variety of sensors. In this case, programmable gain is often required to adapt the circuit to different input signal amplitudes—unipolar or bipolar and single-ended or differential signals with variable common-mode voltages. Most PGIAs traditionally consist of single-ended outputs that cannot directly drive ADCs based on fully differential, high-precision SAR architectures at full speed, requiring at least one signal conditioning or driver stage amplifier. The industry continues to evolve rapidly as people focus more on providing differentiated system solutions through system software and applications. However, due to tight R&D budgets and time-to-market constraints, there is less time to build analog circuits and prototype them to verify their functionality. This puts more pressure on hardware development resources and requires further reduction in design iterations. This article will describe the key considerations when designing a discrete, wideband, fully differential PGIA and demonstrate the precision performance of the PGIA when driving a high-speed signal chain μModule® data acquisition solution.


PGIA Design Description


Figure 1 shows a block diagram of a simplified discrete wideband fully differential PGIA circuit. See Table 1 for key specifications and design requirements for this PGIA circuit.

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Figure 1. Simplified PGIA circuit block diagram


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This discrete PGIA is built using the following parts:


ADA4898-1 low noise, high speed amplifier

LT5400 four-channel matched resistor network used as gain and feedback resistors to set the PGIA gain

ADG1209 low capacitance iCMOS™ multiplexer for controlling PGIA gain

ADA4945-1 Wideband Fully Differential Amplifier (FDA)


This wideband PGIA circuit was chosen to use the above discrete components to meet the PGIA specifications highlighted in Table 1 to achieve optimized ac and dc performance when driving a fully differential high speed signal chain μModule data acquisition solution (such as the ADAQ23875 and ADAQ23878) and ADC (such as the LTC2387-16/LTC2387-18).


Design Tips and Component Selection


The ability of this wideband discrete PGIA solution to drive a signal chain μModule solution based on a high speed SAR architecture and achieve optimized performance depends on key specifications of the amplifier and FDA, such as bandwidth, slew rate, noise, and distortion. The ADA4898-1 and ADA4945-1 were chosen because their gain-bandwidth product (GBW) supports the overall bandwidth requirements of the signal chain. The ADA4945-1 (FDA) is only required when driving an ADC such as the LTC2387-16/LTC2387-18. The criteria for setting the PGIA gain depends on the selected amplifier, feedback resistors, and multiplexer, which are discussed in detail below.


Setting the PGIA Gain


Choose gain and feedback resistors


The gain resistors and feedback resistors of the amplifier should be precisely matched. The LT5400 four-channel resistor network provides 0.2ppm/°C matching drift and 0.01% resistor matching over a wide operating temperature range, with a common-mode rejection ratio (CMRR) that is better than independent matching resistors. The gain resistors around the FDA also need to be precisely matched to achieve optimized CMRR performance.


The LT5400 resistor network is used to set the gain of the amplifier. The gain calculation is shown in Equation 1 to Equation 3.

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When using the LT5400, by setting R1=R4 and R2=R3, the gain is:


The gain of the amplifier and the FDA (fixed gain of 2) make up the total gain of the PGIA, as shown in Table 2.


The LT5400 family offers a variety of resistor options, as shown in Table 2. The ADG1209 multiplexer can be bypassed using an amplifier in a unity-gain configuration, so the total PGIA setting is 2 in this example.



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To set the gain higher than 20, add an external precision matched gain resistor (RGAIN) between the inverting inputs of the two ADA4898-1 amplifiers and use the LT5400-4 as the feedback resistor to achieve the target gains of 64 and 128, as shown in Figure 2.

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Figure 2. Multiplexer, LT5400, and RGAIN resistor set PGIA gain.


To calculate the RGAIN value, refer to Equations 4 to 8.

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To achieve the desired gain, the value of RGAIN should be:

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Select multiplexer


Using a multiplexer, multiple gains of this PGIA circuit can be controlled by selecting the LT5400 four-channel resistor network. When selecting a multiplexer for this wideband discrete PGIA design, several important parameters of the multiplexer should be considered, such as the on-resistance (RON), on-capacitance (CON), and off-capacitance (COFF). The ADG1209 multiplexer is recommended for this wideband PGIA design. Adding a compensation capacitor (Cc) in the feedback path of the amplifier will minimize the high frequency peaking of the gain frequency response (improve the stability of the amplifier) ​​and reduce the impact of the on/off capacitance of the multiplexer. Cc, together with RON, the feedback resistor, and the gain resistor, will form a pole that will compensate for the impact of the zero created by the parasitic capacitance in the feedback loop gain. The value of Cc should be optimized to achieve the desired closed-loop response. When a higher feedback resistor value is used in the ADA4898-1 circuit, higher peaking will appear in the closed-loop gain frequency response due to its high input capacitance (the ADA4898-1 has an input common-mode capacitance of 2.5pF and a differential-mode capacitance of 3.2pF). To avoid this problem, a higher feedback resistor in the ADA4898-1 needs to be connected in parallel with a feedback capacitor. As shown in Figure 2, the optimized Cc value of 2.7pF recommended in the ADA4898-1 data sheet is selected here. When a smaller Cc is used, the gain frequency response has a higher peaking, but if a Cc that is too large is used, the gain flatness of the closed-loop gain is affected.


PGIA Power Supply


Figure 3 shows the evaluation board used to evaluate the performance of this discrete, wide-bandwidth PGIA design.

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Figure 3. Discrete wide-bandwidth PGIA evaluation board


The PGIA front end, which consists of two high-speed ADA4898-1 amplifiers and an ADG1209 multiplexer, requires a ±15V power supply to drive it, while the ADA4945-1 FDA requires a 6V and 2V power rail to achieve optimal signal chain performance. Although this board requires a bench power supply, ADI recommends the LTpowerPlanner® power rail tree structure design for this PGIA circuit, which also shows the load current of each power rail, as shown in Figure 4.

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Figure 4. Recommended power tree


PGIA Performance


Bandwidth


Figure 5 shows a plot of closed-loop gain versus frequency for different gain settings. As the PGIA gain increases from 2 to 128, its bandwidth decreases and its output-referred (RTO) noise increases; therefore, the signal-to-noise ratio (SNR) decreases.

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Figure 5. Bandwidth vs. frequency


CMRR


Figure 6 shows a plot of CMRR vs. frequency for different PGIA gain settings.

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Figure 6. CMRR vs. frequency


Distortion


An Audio Precision® (APX555) signal analyzer was used to test the distortion performance of the PGIA board (Figure 4) by applying different input voltages at different gain settings, setting its output to 8.192V pp. Figure 7 shows the total harmonic distortion (THD) vs. frequency performance of the discrete wideband PGIA.

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Figure 7. PGIA THD vs. frequency


Key Specifications Summary


Table 3 lists key PGIA specifications such as bandwidth, slew rate, drift, and distortion measured on a test bench using a discrete PGIA evaluation board (Figure 4).


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PGIA μModule Solutions for Driving Signal Chains


Figure 8 shows the selected multiplexer as the gain input of two low noise, high speed amplifiers ADA4898-1 in parallel with the LT5400 precision resistor network to form a wideband PGIA that can drive the ADAQ23875 signal chain with a 15MSPS sampling rate uModule. The ADAQ23875 contains an internal fully differential amplifier; therefore, the FDA module in the broadband discrete PGIA evaluation board (Figure 4) should be bypassed. The Audio Precision (APx555) signal source is used to evaluate the SNR and THD, and in this example, the input amplitude is set to approximately -0.5dBFS.

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Figure 8. Simplified signal chain for a discrete PGIA driving the ADAQ23875.


Complete Signal Chain Performance


Noise


Refer to Table 4 for the dynamic range and input-referred (RTI) noise for the complete signal chain (Figure 8) at specific input ranges or gain settings.


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A plot of the SNR performance vs. frequency of the discrete PGIA driving the ADAQ23875 using the ADA4898-1 amplifier is shown in Figure 9. As the gain of the PGIA increases, the overall dynamic range or SNR decreases due to the noise of the individual resistors, amplifier, and the μModule solution itself.


The high precision performance of the ADAQ23878, combined with a high sampling rate, reduces noise and enables oversampling to achieve very low RMS noise and detect small amplitude signals over a wide bandwidth. In other words, the 15MSPS sampling rate greatly relaxes antialiasing filter requirements and maximizes bandwidth when digitizing fast transients and small signal levels. Oversampling refers to sampling much faster than twice the signal bandwidth (which is necessary to meet the Nyquist criterion). For example, oversampling the ADAQ23875 by 4 times provides an additional 1 bit of resolution, or 6 dB of additional dynamic range, or in other words, the improvement in dynamic range due to this oversampling is defined as: ΔDR = 10 × log10 (OSR) in dB. The typical dynamic range of the ADAQ23875 is 91 dB at 15MSPS, with a 4.096V reference and its inputs shorted to ground. For example, when the ADAQ23875 is oversampled 256 times, this corresponds to a signal bandwidth of 29.297kHz and a dynamic range of nearly 111dB (for different gain options), so small signals in the μV range can be accurately detected. Additional oversampling can be applied to trade off noise and bandwidth to accommodate the measurement being performed.

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