Selection of A/D Converters for Power Data Acquisition

0 Introduction

Today's society has higher and higher requirements for power quality , and the country has also specially formulated national standards for power quality . Therefore, the measurement of power quality is increasingly valued by power users. When measuring power, the data collection results from the power grid play a vital role in its accuracy, and the most influential one is the analog-to-digital converter (ADC ) that converts analog signals into digital signals. Often, the technical parameters and indicators of the A/D chip determine the performance indicators of the entire data acquisition system. This article reviews the selection of ADC for power measurement .

1 A/D converter Technical parameters

The technical parameters of A/D converters reflect their performance characteristics. The main indicators are as follows:

(1) Resolution: Resolution reflects the ability of the A/D converter to respond to small changes in input, and is usually expressed by the level value of the analog input corresponding to the lowest bit (LSB) of the digital output.
(2) Accuracy: Accuracy can be expressed in two ways: absolute accuracy and relative accuracy. Absolute error: refers to the maximum value of the difference between the actual analog input voltage corresponding to a digital quantity and the ideal analog input voltage, usually expressed as a fraction of the least significant bit (LSB) of the digital quantity. Relative error: refers to the difference between the actual value and the theoretical value of the analog input quantity corresponding to any digital quantity within the entire conversion range, expressed as a percentage of the full scale of the analog voltage.
(3) Conversion time: Conversion time refers to the time required to complete an A/D conversion, that is, the time interval from the issuance of the start conversion command signal to the effective start of the conversion end signal, and its reciprocal is called the conversion rate. For example, the conversion time of MAX125 is 3μs, and its conversion rate is about 330 kHz.
(4) Power supply sensitivity: Power supply sensitivity refers to the conversion error generated when the voltage of the power supply of the A/D conversion chip changes. It is generally expressed as the percentage of the corresponding analog quantity change when the power supply voltage changes by 1%.
(5) Range: The range refers to the range of analog input voltage that can be converted, which is divided into unipolar and bipolar types.

A/D converters In actual operation, some errors are introduced, mainly including: static error, aperture error and quantization error. All errors are calculated in least significant bits (LSB). 1LSB is defined as VREF/2n, where VREF refers to the reference voltage and n is the resolution of the analog/digital converter. For example, 1 LSB of a 14-bit analog/digital converter is VREF/16 384.

(1) Static error: When converting a DC signal, the static error can be represented by offset error, gain error, nonlinear error and differential nonlinear error. Offset error: Offset error is the deviation between the actual ADC transfer function curve and the ideal transfer curve, that is, the actual curve has shifted.

Gain Error: Gain error is the difference between full-scale error and offset error.

Non-linear error: Non-linear error refers to the maximum deviation between the actual transfer characteristic curve of the converter and its average transfer characteristic curve.

Differential nonlinearity error: It represents the interval between the output code and its adjacent code. It is obtained by measuring the change in input voltage and converting it to LSB, which is what we usually call ±1LSB, ±0.5LSB and other indicators.

(2) Aperture error: The error caused by the delay between sampling and holding due to noise in the sampling clock or input signal.

(3) Quantization error: The quantization error of the A/D converter is determined by the conversion characteristics of the A/D converter. This error is caused by the conversion characteristics and is a principle error that cannot be eliminated. After the A/D converter is selected, its quantization error is also determined. The quantization error and resolution are unified. The quantization error is the error caused by the discrete value (quantization) of the analog number by a finite number. Therefore, the quantization error is theoretically a unit resolution, that is, 1LSB. Improving the resolution can reduce the quantization error.

The above errors constitute the total error of the A/D converter. When considering the comprehensive influence of the above errors, the total error of the A/D converter should be expressed as the root mean square of various errors.

2 A/D converter Theoretical analysis of selection

2.1 Overview

The sampling process is limited by the ADC conversion accuracy and conversion rate. On the one hand, for a specific analog-to-digital converter, the accuracy that its data bits can represent is determined by the number of conversion bits of the ADC . On the other hand, each conversion data of the analog-to-digital converter needs a conversion time before it can be read. The more data bits there are, the longer the conversion time is, and the corresponding conversion rate is slower. This requires a compromise solution between the conversion accuracy and conversion rate of the ADC . The higher the requirements for conversion accuracy and conversion rate, the more difficult the analog-to-digital conversion is. Based on the available and reasonably priced analog-to-digital converters on the market, the literature [3] makes a rough estimate. As shown in Figure 1, it describes a relationship between the conversion accuracy and conversion rate of the ADC .

The upper left area of ​​Figure 1 represents what is easily available, while the lower right area is almost impossible to achieve. The solid line in the middle represents the performance of typical ADCs that can be provided on the market at a reasonable price . They are representative of the performance of existing ADCs that can be selected in power quality measurement, such as MAX125.

2.2 Conversion Accuracy

For an ADC with a given number of conversion bits , the level of data bits that can be discretized for the signal is fixed. A 14-bit ADC provides 16,384 discrete levels. If the signal is a bipolar AC signal, the total data bits are usually evenly distributed between positive and negative polarities. For ADC , the data level that they can discretize must be sufficient to include the highest amplitude of the expected signal, and at the same time, the data bits must be small enough in order of magnitude, without interruption, and adjacent to ensure the required accuracy. In harmonic measurement, the frequency component of the representative fundamental wave is the component with the largest content. Therefore, the dynamic range of the ADC is required to be set in the middle of the fundamental component that can accommodate 100%. However, the required accuracy depends on the minimum amplitude to be measured. For the measurement of the harmonic range, its minimum amplitude is determined by the minimum distortion rate. In the national standard for harmonic measurement, for the specified distortion rate, the harmonic measurement requires an accuracy of ±5%.

2.3 Conversion rate

The higher the conversion rate of the ADC , the higher the price. Generally, only low-frequency transient phenomena are measured by general-purpose ADCs , and ultra-high-frequency transient phenomena can only be measured with special equipment. For common low-frequency transient phenomena, a converter with a conversion rate between 10 kHz and 100 kHz is sufficient.

2.4 Sampling Method

When monitoring harmonics, it is often necessary to sample several signals simultaneously. I have done synchronous sampling of 8 signals. Generally, there are three methods:

(1) Interval scanning method: It is a method of simulating simultaneous sampling. Figure 2 illustrates this interval scanning method.

For this method, there is a very small time error ts between sampling two channels. This time error ts is actually the sampling period of the ADC , which is determined by the maximum conversion rate of the ADC . For example, when using an ADC with a sampling speed of 200 kHz , the sampling timing error is 5μs.
T is the scanning period, which is an adjustable value that is set according to the phenomenon being measured. For measurements up to the 50th harmonic, the minimum scanning rate is 5 kHz or T≤200μs. If it is a 200 kHz ADC , the time error ts of each channel should be kept within 5μs. For the 50th harmonic (50 Hz×50=2.5 ​​kHz, that is, the period is 400μs), its phase error is roughly: (5μs／400μs)×360°=4.5°. The higher the harmonic order, the greater the error angle. If an ADC is shared by multiple channels, the timing error is different for the first channel and the last channel and is equal to N×ts, where N is equal to the total number of channels the ADC is shared by.

(2) Alternating sampling method: The so-called alternating sampling method is to collect data within one cycle of the measured signal. For example, 256 points are to be sampled, of which 128 odd points are voltage sampling points and 128 even points are current sampling points. The time difference between sampling voltage and current is △t=T/256 (T is the cycle of the measured signal). The phase error of the same-phase voltage and current caused by this is 360°×f×n×△t, where f is the frequency of the measured signal and n is the harmonic number. From this formula, it can be seen that the phase error increases with the increase of the time difference △t and the harmonic number n.

(3) Synchronous sampling method: The author adopts the method of synchronous sampling of 4 voltages and 4 currents with the same phase and time-sharing transmission. This method does not have the problem of time difference, and phase difference does not exist, but requires that each channel must have a sample and hold circuit.

3 Design Examples

Here is a power harmonic monitor based on DSP (TMS320C545). According to the above analysis, the AD chip for data acquisition is good for Texas Instruments' ADS7864 and MAXIM's MAX125. The latter is used here. Because the three-phase voltage and current of A, B, and C need to be sampled, there are 6 analog input channels in total. In order to ensure that the 6 power frequency signals maintain the correct phase relationship, the data should be sampled synchronously. However, one MAX125 can only convert 4-channel differential signals at most, so two MAX125s are used. The data acquisition interface block diagram is shown in Figure 3.

The two MAX125 a and b are set to 3-channel differential sequential sampling mode. Each MAX125 is connected to a signal conditioning circuit before the analog signal input, which is used to isolate and anti-alias filter the high voltage of the power grid, and convert the input level into the voltage when the chip is working normally. This part is not shown in the figure. When this device performs harmonic analysis, in order to achieve the required measurement accuracy, the 6-channel analog signal requires no less than 1,024 sampling points in each power frequency cycle, and then leaves 512 points that are as uniform as possible, and then performs fast Fourier transform. In order to ensure accuracy, only the first 50 harmonics are taken. This requires that the conversion time of the 6-channel signal must be less than 20 ms/1,024≈19.5μs and sufficient margin must be left. Because the signal conversion of each channel of MAX125 takes 3μs, it takes 3×3=9μs for each MAX125 to convert the three channels in sequence. Therefore, the two MAX125s here are connected in parallel and started at the same time, so that they can complete the sampling, holding and conversion of 3 voltages and 3 currents at the same time. It only takes 3×3=9μs, plus the time to read the data, which is much more than 19.5μs. Of course, if the two MAX125s are connected in series, the A/D conversion time is 18μs, which is less than 19.5μs, but the margin is not enough.

The I/O operating voltage of TMS320C545 is 3.3 V, and the digital operating voltage of MAX125 is 5 V, so a level conversion chip that converts from 5 V to 3.3 V must be added between them. Conversely, the signal sent from TMS320C545 to MAX125 is within the allowable range of MAX125 and will not cause damage, so there is no need for level conversion.

When the grid frequency is 50.60 Hz, the root mean square value of the measurement error of each harmonic distortion rate measured by this power harmonic monitor is shown in Table 1, and the measurement effect is satisfactory.

4 Conclusion

The ADC used to measure power quality must have enough dynamic range to handle the highest amplitude of the signal while maintaining enough bits to achieve the required accuracy. Also, its sampling rate must be high enough to sample the highest frequency components in the signal.