Abstract: Design of a printed board fault diagnosis system based on over-driving technology. The system consists of an industrial control computer, an overdrive function board and a test needle bed board. The design of the overdrive function board fully considers various fault models of the object under test, and the test functions are relatively complete. The concept of component "level" is proposed. Based on this concept, the interface between the needle bed board and the function board is designed, and the test strategy is optimized.
Research on automatic testing and diagnosis of digital equipment faults continues to develop with the development of digital equipment. Traditional digital equipment fault diagnosis technology utilizes the characteristics of semiconductor devices that allow transient overload, and uses overdrive technology to isolate and test devices online. Subsequently, infrared testing technology and a new generation of non-vector testing technology have emerged, such as capacitive coupling technology and radio frequency. Magnetic field induction technology, simulated junction effect testing technology, etc. At present, there are many general-purpose printed board fault diagnostic instruments developed at home and abroad, and their functions are relatively strong.
For different test objects and test requirements, various fault diagnosis methods have their own advantages. The digital equipment fault diagnosis systems currently on the market also have certain limitations for specific test objects and requirements. According to the characteristics of the object under test, this paper designs a printed circuit board circuit fault diagnosis system based on traditional overdrive technology.The system includes an industrial control computer, an overdrive function board, a test needle bed board and the circuit board under test. The core of the design is the overdriven functional board test pin bed board.
1 Overall system design
The object of this system diagnosis is a set of digital equipment, which consists of multiple digital circuit printed boards mainly composed of TTL devices. This system performs device fault diagnosis and repair on faulty diagnostic objects, so there is no fault in the tested object that the device is inserted in the wrong direction. Possible fault models of the system mainly include: ① Device functional failure; ② Bridging failure of the circuit board; ③ The insulation resistance between the power supply and the ground is too small or short-circuited. In addition, the system is required to be smaller in size and lighter in weight.
The structural block diagram of the system is shown in Figure 1. The system mainly consists of a microcomputer, LCD display, operating buttons, overdrive power supply, overdrive function board and test needle bed board. In order to reduce the size and weight of the system, an industrial computer system platform and an LCD display are used; in order to facilitate operation, certain function keys are set to replace the keyboard; in order to reduce the interference of over-driving on the operating platform, an independent power supply is used for the over-driving function board . During the test, the test needle bed is in reliable contact with all network nodes of the printed board under test through probes. Since the test needle bed plate of this system and the mold for installing the test needle bed plate require high machining accuracy, they must be processed using precision machining tools.
2 System hardware implementation
2.1 Design of overdrive function board
The most fatal fault of a printed board is a short circuit between the power supply and ground (blindly energizing the printed board can easily burn the components and circuit board). The overdrive function board is designed to test the impedance between the power supply and the ground when the printed board is not powered. The circuit principle is shown in Figure 2.
When the impedance between the printed circuit board power supply and ground is too small or short-circuited, the LED lights up.
Because printed circuit board bridging faults change the circuit topology, they are difficult to diagnose using traditional vector test generation techniques. Applying the online testing method, that is, testing the impedance between all network nodes without power on the printed circuit board under test, can better diagnose the bridging fault that occurs in the entire circuit. The circuit principle is shown in Figure 3.
Any two network nodes are connected to the sampling circuit through the strobe of the address switch. The sampling circuit uses the principle of voltage division to measure the resistance between a and b.
The overdrive function board is plugged into the ISA bus slot of the computer. Because when overdrive is added instantaneously, the load of the power supply will suddenly increase, causing relatively strong interference to the computer. Therefore, the overdrive current of the overdrive function board must be provided by an independent power supply, and the control components of the overdrive function board are still controlled by the computer. power access.
When testing the functional failure of the device, the design of the overdrive function board should also consider the following factors:
(1) Each network node may be an input point for overdrive or an output point for response;
(2) When used as an overdrive point, it may be a current sinking point or a current sourcing point;
(3) Due to the large overdrive current, high-speed relay control is required;
(4) Due to the transient nature of overdrive, it is necessary to ensure that the excitation is applied at the same time and the response is tested at the same time;
(5) Due to the limitation of the number of computer data lines, the state of the excitation must be latched first. Then a control line is used to simultaneously add excitation to the printed board under test, latch the response of the printed board under the excitation, and then read the response results multiple times.
Based on the above factors, the functional test circuit designed for each network node is shown in Figure 4.
The circuit structure design description is as follows:
(1) The current sinking and sourcing current transmission paths are controlled by high-speed relays, and other control gates are controlled by TTL gates.
(2) When the printed board is not powered on, the SPDT high-speed relay is grounded to connect the measured point to the multi-select 2 switch, and the bridge fault test path of the circuit is connected; when the printed board is powered on, it is connected to the driver The path from the circuit to the measured point allows the measured point to accept sinking or sourcing current to connect the output circuit.
(3) The test point status selection terminal controls whether the measured point is input or output when the printed board is powered on.
(4) The excitation application control end and response test control end of each measured point are connected together to ensure that the excitation is applied and the response is tested at the same time.
The above circuit of each tested network node is regarded as a module, and the module is shown in Figure 5.
The control principle of the modules and computer system bus of all measured points is shown in Figure 6. The printed circuit board power-on control in the figure is directly controlled by the operation button switch on the microcomputer panel.
2.2 Design of test needle bed board and overdrive function transfer
Any combinational logic circuit can use the tree structure in graph theory to represent its topological relationship. Small circles are used to represent devices, and line segments are used to represent the flow direction of signals (a directed line corresponds to a network node). When there is fan-out In the circuit, each fan-out point is represented by a bifurcated directed line segment. The logic circuit topology is shown in Figure 7. Among them, a, b, c, and d are the original input terminals, 1 to 9 are directed line segments, and A, B, and C are devices.
A network node on a printed board is both an input to one device and an output to another device, and it is impossible for the network node to be both an input and an output in one test. Therefore, determining a reasonable testing strategy can make full use of system resources and test all devices in the shortest time.
This article proposes to divide devices into different "levels" based on the circuit topology of the printed board under test. Before discussing the concept of "level", let us first introduce the concept of "path length". "Path length" is the number of devices that the signal from the original input terminal passes through when it is transmitted to the output terminal. Take Figure 7 as an example: 1 to 4 constitute a path, passing through one device A, and the path length is 1; 1 to 5 to 8 to 9 form another path, passing through three devices, and the path length is 3. The principle for determining the "level" of a device is: the longest path from the original input to the input of the device is the "level" of the device. According to the "level" of the device, the following overdrive test strategy can be determined: first overdrive the odd-numbered "level" devices, and then overdrive the even-numbered "level" devices. In order to achieve such a test purpose, the test pin bed board connects the input terminals of devices of different "levels" together when leading out each network node.
3 Some notes on system testing
When this system tests different printed boards, it uses different test needle bed boards. Each needle bed board has different transfer relationships when connected to the universal overdrive function board.
The execution of different fault test subroutines corresponding to different printed boards is directly controlled by control buttons.
The fault diagnosis strategy is implemented by the test subroutine and the hardware connection between the overdrive function board and the test needle bed board. When testing a certain device, if there is a feedback loop from the output end of the device to the input end, the feedback loop must be disconnected, otherwise erroneous test results will be obtained due to feedback burrs.
This paper designs a printed board fault diagnosis system based on over-driving technology in detail. The system uses an LCD display and button control to achieve system miniaturization and ease of operation; a universal process is designed based on the characteristics of the object being tested and fault models (such as bridge faults, power supply faults, and device functional faults). Drive function board with strong diagnostic function. This literature proposes the concept of device "level". Based on this concept, the interface between the needle bed board and the function board is designed to optimize the diagnostic strategy.
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