Amplitude separation circuit

Amplitude separation circuit

  The typical amplitude separation circuit is shown in Figure 8-2. It consists of a transistor, capacitor C, resistor RB, and RC. The input signal is a full-length video signal after detection, usually with a peak-to-peak value of about 2V. The output signal is a composite synchronization signal. For simplicity, only the horizontal synchronization pulse is drawn in the figure. In the circuit of Figure 8-2, it is downward and the amplitude is above 10V.

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Working principle of amplitude separation circuit:

  The transistor is not biased by DC. When there is no signal, it is in the cut-off state. There is no voltage drop on RC, and the level of the output end is the power supply +12V. When the video full TV signal arrives, the emitter junction of the transistor, the capacitor C, and the resistor RB form a circuit similar to the detection circuit. During the synchronization pulse time when the signal voltage is greater than 0.65V, the emitter junction is turned on, and the capacitor C is charged. The charging current i charging path is shown in Figure 8-2. When the synchronization pulse passes, the signal voltage is lower than 0.65V, the emitter junction is not turned on, and the charge on the capacitor C is discharged through RB and the signal source (pre-stage). The i discharge path is shown in the figure. If the signal waveform repeats several line cycles, this charging and discharging process is stably balanced, and the voltage on the capacitor C is equal to the average value of the signal voltage.

  换言之, 电容C把信号电压的直流分量(平均值)隔断。 晶体管只在同步脉冲的时间内导通, RC上产生电压降, 输出电压就成为图中所示的负脉冲, 脉冲幅度为电源电压减去管子饱和压降, 大于10V。 这样就完成了把同步脉冲从视频全电视信号上切割下来的作用。 在图8 - 2的电路中还具有箝位作用, 它使同步头的电平始终箝在0.65V上下。 发射结起着箝位二极管的作用。 
  箝位的必要性: 图像信号的平均值随图像内容要发生变化, 当画面较暗时, 平均电平就向上移动, 趋近黑色电平。 反之, 当画面出现明亮的场景时, 平均电平就要下移, 趋向白色电平。
  此外, 接收信号的强度因地点、 天线方向和周围建筑物分布情况等因素会有较大变化, 尽管接收机中采用自动增益控制(AGC)电路, 但中放输出电平也会有百分之几十以上的变化。 所以检波后的视频崐全电视信号其幅度仍有一定的变化, 所以不宜采用一个固定的电平来切割同步头, 否则, 当信号幅度和平均值发生变化时, 切下来的同步头高度就不同, 甚至可能切到图像信号电平上。于是同步就会不稳定, 影响收看效果。

  The characteristic of the circuit in Figure 8-2 is that when the input signal amplitude changes, the average voltage on the capacitor also changes accordingly, maintaining the base conduction voltage around 0.65V (or, the negative bias of the emitter junction automatically moves with the change of the signal amplitude and the average value).
  The transistor works in a switching state. When the synchronization pulse arrives, it is turned on instantly, and when the synchronization pulse passes, it is cut off most of the time. To make the output synchronization pulse waveform good, a switching transistor should be used. In addition, the saturation voltage drop of the transistor should be low to ensure the output amplitude of 10V.
  The value of capacitor C should be appropriate and should not be too small. Its charging time constant should be several times larger than the field synchronization pulse width, otherwise the top of the output field synchronization pulse will drop. However, if C is too large, it cannot adapt to the change of the image signal content (average value), resulting in the loss of synchronization pulses when the screen switches quickly (the voltage charged on C is not discharged in time, and the subsequent several lines of pulses are not turned on). Usually the value of C is around 1μF.

  The input signal of Figure 8-2 is negative polarity. Since the output signal of the detection output circuit is mostly positive polarity, the amplitude separation circuit of the positive polarity video full television signal is shown in Figure 8-3 as V2, and its working principle is the same as Figure 8-2. Among them, the transistor V2 adopts PNP type, which can be turned on when the downward synchronization head comes. It is cut off at other times. The output resistor is connected between the collector and the ground, and the output pulse is upward. The amplitude is still above 10V. The bias resistors of 68 kΩ and 510 kΩ make the base of V2 slightly biased, just in the state of conduction, to improve the synchronization sensitivity.