ST-Ericsson Mobile Platform Multi-core Processing Technology (Part 3)

In recent years, in order to ensure that the silicon manufacturing technology node is further reduced and break through the limits of traditional technology, semiconductor companies have carried out a large number of new technology research and development and achieved many breakthrough development results, such as FinFET and FD-SOI manufacturing processes.

ST-Ericsson uses STMicroelectronics' FD-SOI (Fully Depleted Silicon-On-Insulator) technology for its next-generation 28nm mobile platform with very high performance. Here, we will only briefly analyze the technical advantages of FD-SOI from the perspective of computing performance, and explain how this technology can further improve the performance of single-core processors, so that we can continue to focus on faster dual-core processors for higher software performance.

As shown in Figure 7, due to the insertion of an ultra-thin buried oxide layer substrate, FD-SOI greatly improves the electrical characteristics of transistors while continuing to use a very mature planar process to manufacture chips.

The advantages of FD-SOI are summarized below:

Faster: At the same technology node, the channel of FD-SOI transistors is shorter than that of bulk effect transistors, and the former is a fully depleted channel with no dopants. With these two factors working together, FD-SOI transistors switch faster at the same voltage, with a 35% increase in high-voltage operating frequency and a higher low-voltage operating frequency at the same power consumption.

Lower power consumption: Several factors contribute to the lower power consumption: a fully depleted channel eliminates drain-induced parasitics, better restricts carrier flow from source to drain in low-power mode, a thicker gate dielectric reduces gate leakage, and better control of body biasing techniques (the voltage applied to the body of the transistor to better control speed and power consumption). The result is a 35% reduction in power consumption at high performance and an even greater reduction of up to 50% at low performance.

Simpler process: The FD-SOI manufacturing process is 90% similar to 28nm bulk technology, with a 15% reduction in total steps and a shorter R&D cycle. In addition, FD-SOI technology does not require a pressure source or other similar complex technologies that other processes may require. The final process complexity is lower than bulk technology, and much lower than technology.

From the perspective of microprocessor design, FD-SOI has obvious advantages over bulk effect technology (see Figure 2).

FD-SOI can achieve higher frequencies at the same voltage/power consumption, or lower power consumption at the same frequency;

Higher maximum achievable frequency

Processors using FD-SOI technology can maintain very good frequencies at lower voltages (e.g., 1 GHz at 0.65 V). In low-power mode, the comparative advantage of FD-SOI is even more prominent, as shown in the low-voltage region of Figure 8. In low-power mode, the frequency is 100% higher than bulk technology.

At high frequencies, the efficiency improvement is about 35%, which is enough to allow an FD-SOI dual-core processor to outperform a slower bulk quad-core processor in many use cases, as mentioned above, because software performance improvements are currently limited.

In terms of low power consumption, FD-SOI technology has a greater impact, eliminating the need to resort to the more complex and immature approach of heterogeneous multi-core processors to reduce power consumption.

The extended operating modes discussed above are achieved by the previously mentioned technical advantages of FD-SOI, in which body biasing plays an important role. Body biasing is to apply a specific voltage to the transistor body to optimize the transistor characteristics according to each specific operating mode. FD-SOI technology does not require a parasitic diode between the body and the source and drain of the body effect transistor, so FD-SOI allows a wider voltage range to be applied.

) In fact, we seem to have achieved the same effect with two different processor designs (see Figure 9). One is optimized for high performance and the other is optimized for low power, but we use only one circuit to control the transition between high performance and low power modes by changing the body bias. ST-Ericsson calls this concept "eQuad", and the final performance is equivalent to or even better than the heterogeneous quad-core processors mentioned above.

Figure 10 compares our first FD-SOI product, the NovaThor? L8580, which has an eQuad processor based on two ARM Cortex-A9 processors, with a quad-core processor in a big.LITTLE configuration; the former has an eQuad processor based on two ARM Cortex-A9 processors, and the latter operates at a frequency that is representative of the recent quad-core processors. Because the voltage/frequency range is extended, higher performance can always be achieved at the same power consumption, both when operating at high frequencies and at low power consumption, which is attributed to the Cortex-A9 processor. Compared to the Cortex-A9, which is ARM's previous generation processor architecture. In addition to higher performance and lower power consumption, there is another important advantage: the use of a simple traditional dual-core processor structure and the mature technology of processor management software, while big.LITTLE products require the complex hardware and software management methods required for heterogeneous multi-core processors discussed above.

ST-Ericsson Computing Technology Development Roadmap

The ST-Ericsson Computing Product Strategy and Development Roadmap (Figure 11) reflects the current view that contemporary mobile phone software should take advantage of the processor's full potential in a way that fully exploits the processor's performance, which continues to increase as silicon technology evolves, meaning that faster dual-core processors are the best choice.

It is worth mentioning that designing a higher frequency dual-core processor while complying with mobile power consumption limits requires greater R&D resources than duplicating a less proactive design and developing a lower frequency quad-core processor. The reason we have always insisted on this development direction is that software performance currently directly benefits from higher frequencies without any changes to the software code. To realize the full potential of processors above dual core, it requires a huge R&D investment in software.

Looking to the future, we are investigating a variety of different options, including quad-core processors and beyond.

Like PC processors, the frequency increase of mobile processors will sooner or later be limited by power consumption. Our next generation of products will also benefit from the silicon technology breakthroughs we have achieved, but in the future, the frequency will start to approach the situation of PC processors infinitely, and inevitably reach saturation. Moving to quad-core processors is the only way to continue to improve performance. Hopefully, software will have long-term development before this, so that the full potential of more aggressive quad-core processors can be fully utilized.

in conclusion

This article focuses on the main differences between PC processors and smartphone processors in terms of product evolution routes: In 2005, PC multi-core processors were launched after the power consumption caused by the processor frequency reached saturation, which was an inevitable result; while smartphone multi-core processors came out long before the frequency saturation.

The PC industry is responsible for the early entry of mobile phones into the dual-core era. Dual-core technology is mature and ready for implementation and application. Dual-core processors are effective because there is native, but limited parallel code in the operating system and application software. However, the evolution from dual-core to quad-core is mainly due to the aggressive marketing strategy of the smartphone market. From a technical perspective, there is no convincing motivation for software to effectively utilize processors with more than two cores. In fact, neither the PC industry for 10 years nor the smartphone industry more recently has sufficient motivation to drive most developers to engage in expensive and laborious software parallelization projects. The need for software parallelization in processors beyond dual-core has prevented existing quad-core processors from realizing their full potential.