With the continuous development of wireless communication technology, technologies such as Bluetooth, RFID, and WIFI have emerged in the field of short-range wireless communication. These technologies are constantly being used in embedded devices and PC peripherals. 2.4 GHz wireless mouse and keyboard use the 24-2.483 5 GHz wireless frequency band, which is unlicensed in most countries around the world, which has cleared the biggest obstacle to the popularization of wireless products. Users can quickly enter the wireless design field that is synchronized with the world, minimize the design and production time, and have perfect performance, which can replace Bluetooth technology.
1 System Hardware Structure
The 2.4 GHz wireless mouse and keyboard receiver mainly realizes the enumeration and identification process of HID devices such as mouse and keyboard on the PC and receives the data sent by the wireless mouse or keyboard (including key values, up, down, left, right, etc.), and transmits the received data to the PC through the USB interface to realize the wireless control function of the mouse and keyboard. The receiver is mainly composed of the USB interface part, MCU and wireless receiving part. The system hardware block diagram is shown in Figure 1.
1.1 USB interface part
The system uses the 8-bit USB multimedia keyboard encoder HT82K95E produced by HOLTEK as the system core. HID devices such as mouse and keyboard are low-speed devices, so the receiver must be able to simultaneously realize the bidirectional transmission of mouse and keyboard data with the PC. The MCU must first have a low-speed USB interface and support at least 3 endpoints (including endpoint O). After comprehensive consideration, the HT82K95E was selected as the main control chip of this system.
The circuit diagram of the USB interface of this system is shown in Figure 2, where resistors R100, R101, R102, R103, R104 and capacitors C102, C114 and C115 are used for EMC. Since the mouse and keyboard devices are slave devices, a 1.5 kΩ pull-up resistor should be added to the USB-signal line.
Figure 2
1.2 MCU part
The reset circuit of the MCU uses an RC integrator circuit composed of R108 and C105 to implement the power-on reset function. At the moment of power-on, since the capacitor voltage cannot change suddenly, the reset pin is at a low level, and then the capacitor begins to charge slowly, the reset pin potential begins to rise, and finally becomes a high level, completing the power-on reset of the chip. The HT82K95E microcontroller also contains a low voltage reset circuit (LVR) to monitor the power supply voltage of the device. If the power supply voltage of the device drops to the range of 0.9 V to VLVR and exceeds 1 ms, the LVR will automatically reset the device.
It should be noted that a diode 1N4148 should be added to the reset circuit of the device, and the connection method is VD100 in Figure 2. If this diode is not added, the device can be reset normally when it is used for the first time, but it cannot be reset normally in subsequent uses because the charge in the capacitor cannot be released, while the diode can quickly release the charge in the capacitor through the entire circuit.
Since the packet processing mode of nRF24L01 supports low-speed communication with the microcontroller and high-speed communication with the wireless part, and there are 3 different RX FIFO registers and 3 different TX FIFO registers inside nRF24L01, the MCU can access the FIFO registers at any time in power-down mode, standby mode and during data transmission. This allows the SPI interface to transmit data at a low speed and can be applied when there is no SPI interface on the MCU hardware. Therefore, the PA port of HT82K95E is used in the design to simulate the SPI bus and communicate with the SPI interface of nRF42L01.
1.3 Wireless receiving part
The circuit diagram of the wireless receiving part is shown in Figure 3. Since nRF24L01 is a high-frequency component working at 2.4 GHz, the quality of the system's PCB design directly affects the system's performance. When designing, various electromagnetic interferences must be taken into account, and attention must be paid to adjusting the positions of resistors, capacitors, and inductors, especially the position of capacitors. The PCB of the nRF24L01 module is a double-sided board, and no components are placed on the bottom layer. In the ground layer, the empty space on the top layer (except the antenna substrate) is covered with copper and connected to the bottom layer through vias.
2 Protocol Analysis
2.1 nRF24L01 wireless communication protocol
The 2.4 GHz wireless communication protocol is divided into three layers: physical layer, data link layer and application layer. The physical layer includes GFSK modulation and demodulation, receiving and transmitting filters, RF synthesizer, SH interface and power management, and mainly completes data modulation and demodulation, encoding and decoding, FHSS frequency hopping spread spectrum and SPI communication. The data link layer mainly completes the unpacking and encapsulation process. This protocol has two basic packets: data packets and response packets. The data packet format is shown in Table 1.
The preamble is used to detect 0 and 1. nRF24L01 removes the preamble in receive mode and adds the preamble in transmit mode. The address content is the receiver address, and the address width is 3, 4 or 5 bytes. The receive channel and the transmit channel can be configured separately. The receiver automatically removes the address from the received data packet.
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