Recalling the article " Basics of Digital Design - Frequency and Time ", the main frequency components of digital signals are all below its corner frequency. The corner frequency FKNEE is related to the pulse rise time TR, and has nothing to do with propagation delay, clock rate or conversion frequency:
The entire path of signal propagation, including device packaging, circuit board layout, and connectors, should have a flat frequency response at least before FKNEE if they are to correctly distribute digital signals with a transition time of TR. If the frequency response of a path before FKNEE is not flat, the signal received at the end of the path may have rise time degradation, bulging, overshoot, or ringing.
Shortening the rise time will force the value of FKNEE to increase, making the signal propagation problem more serious. This is the primary disadvantage of shortening the rise time too much.
The DV/DT of a circuit may also affect the signals on other adjacent circuits. This crosstalk is generated by the mutual capacitance mechanism. Two adjacent circuit elements will always have capacitive interaction. Reference is as follows:
"With both resistors connected to ground, the corresponding capacitive coupling is equal to 0.004, while the inductive crosstalk is 0.032. This is a typical ratio for a circuit operating at a 50 ohm impedance level. For high impedance circuits, the DV/DT involved is large, and the DI/DT is relatively small, resulting in a correspondingly larger capacitive coupling.
In the case of low output impedance of the gate, the inductive coupling problem is magnified when the gate drives the transmission device directly. In this case, the total inductively coupled signal energy is terminated at the far end, rather than being split in two as in Example 1.4.
As mentioned above, in digital systems, the crosstalk caused by mutual capacitance is much smaller than the crosstalk caused by inductance.
We can relate the circuit's maximum DV/DT to its 10-90% rise time and voltage amplitude △V:
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