Design of Digital Frequency Synthesizer Based on SystemView-EEWORLD

Collect

1 Principle of frequency synthesis technology

There are many methods of frequency synthesis. The most commonly used frequency synthesis technologies are direct frequency synthesis, direct digital frequency synthesis, and phase-locked frequency synthesis.

The direct frequency synthesis method is to directly add, subtract, multiply, and divide the reference frequency through a frequency multiplier, a frequency divider, and a mixer to obtain various required frequencies. Its advantages are fast frequency conversion speed and the ability to produce arbitrarily small frequency increments. However, it also has some insurmountable disadvantages. It requires a large power of the reference signal. Due to a large number of frequency multiplication, mixing, filtering and other circuits, the synthesizer equipment is very complex, and the harmonics, noise and parasitic frequencies at the output end are difficult to suppress.

Direct digital frequency synthesis has emerged with the development of ultra-high-speed digital circuits. It is mainly obtained by solving mathematical recursive equations or directly looking up sine tables through microprocessors, and its output waveform is partially synthesized. Its advantages are mainly high resolution, flexible control, and easy to achieve relatively low frequencies. However, due to the control of the device clock frequency, the upper limit of the output frequency cannot be too high, and the total output noise level may be relatively high.

Phase-locked frequency synthesis technology is based on the synchronization principle of the phase-locked loop, and uses the narrowband tracking characteristics of the phase-locked loop to obtain different frequencies. Phase-locked frequency synthesis has two types: direct phase-locked and digital phase-locked. The frequency multiplier is actually a type of direct phase-locked, while digital phase-locked is to insert a frequency divider with a variable frequency division ratio into the phase-locked loop, and different frequency points can be obtained through CPU control. As shown in Figure 1, this is a schematic diagram of a typical direct phase-locked loop frequency synthesizer. It consists of three parts: a reference oscillator source, a reference divider, and a phase-locked loop.

The difference between the phase-locked loop and the ordinary phase-locked loop is that a variable frequency divider is added to the feedback loop between the output of the VCO and the input of the frequency detector. As shown in Figure 1, the high-stability reference oscillator source signal is divided R times to obtain a reference pulse signal with a frequency of fR. At the same time, the output of the voltage-controlled oscillator is divided N times to obtain a pulse signal with a frequency of fN. The two pulse signals are compared in phase in the phase detector. When the loop is in a locked state, there is an output signal: fo=N·fN=N·fR.

2 Introduction to SystemView Software

SystemView software is a development tool software developed by ELANIX in the United States for the design, simulation, analysis and evaluation of visual system models. It adopts a graphical programming method under the Windows environment, has a friendly and powerful debugging environment, and is a powerful tool for real signal-level system design simulation.

The operation in the SystemView environment is relatively simple. According to the system design requirements, the various function icons provided by SystemView itself are used to establish a simulation model and set its parameters. After setting parameters such as the system running time, simulation analysis can be performed.

3 Design and simulation of digital frequency synthesizer

Based on the above analysis of digital frequency synthesizer, a typical digital frequency synthesizer model is established in the SystemView design environment, as shown in Figure 2. In this model, the VCO of the phase-locked loop is replaced by the FM symbol (symbol 2), its carrier frequency is set to 195 Hz, the gain is 20 Hz/V, the loop low-pass filter uses an 8-pole Bessel low-pass filter with a passband of 5 Hz, and the divider uses the N-fold divider in the communication symbol. According to the output characteristics of the phase-locked loop, if the division ratio N=20, the output frequency fo of the phase-locked loop should be locked at the frequency fo=N·fR=20·fR.

Assuming that the input reference oscillator is 1 kHz, it is divided by 100 and enters the digital frequency synthesizer as the reference frequency, that is, the reference frequency is fR=10 Hz. When the system time parameter is set to 1 000 Hz and the number of sampling points is 16 384, the constructed system is simulated. When N=20, it can be seen from the spectrum of the output signal in Figure 3 that a higher spectrum energy peak appears at a frequency of 200 Hz, which indicates that the frequency of the output signal is locked at 200 Hz. When N is changed to 18, the spectrum of the output signal has a high energy peak near the frequency of 180 Hz, as shown in Figure 4. Similarly, it means that the frequency of the output signal is in a locked state at this time.

From the above simulation analysis, it can be seen that by changing the value of N, the frequency of the output signal will become an integer multiple of the reference frequency 10 Hz. But in fact, due to the locking range limitation of the phase-locked loop (related to the filter bandwidth and the maximum carrier variation range of the VCO), only several integer multiples of the frequency near the VCO carrier frequency can be output. When N=23, the output signal spectrum is shown in Figure 5. The peak value of the spectrum energy is not as clear as the above figure, but there is an energy peak area, which shows that the output signal frequency is relatively evenly distributed in the 180-240 Hz band. At this time, the phase-locked loop is in a unlocked state and the frequency synthesizer has lost its function. Therefore, when setting the division ratio, the N value cannot be set too high. In practical applications, especially in ultra-high frequency working conditions, in order to obtain a larger range of frequency selection (more frequencies) and a smaller step frequency, a swallowing pulse phase-locked loop frequency synthesizer is often used.

4 Conclusion

A typical digital frequency synthesizer was constructed by using SystemView simulation software. The simulation analysis results show that multiple frequency-stable output signals can be generated within the maximum variation range of the filter bandwidth and the carrier of the VCO. Currently, frequency synthesizers used in various radio stations generally use variable digital phase-locked loop frequency synthesizers.

Keywords：SystemView Reference address：Design of Digital Frequency Synthesizer Based on SystemView

Previous article：Design of soft-switching converter drive circuit based on MC34152 and CMOS
Next article：Analog/digital converter using low voltage differential signaling data bus

Popular Resources
Popular amplifiers