ADC Peripheral Circuit Design Method

When using ADC chips, due to the diversity of ADC models, their performance has its own limitations. Therefore, in order to make the ADC adapt to the needs of the site and meet the requirements of the subsequent circuit, it is necessary to design the peripheral circuit of the ADC. The design of the ADC peripheral circuit usually includes the design of analog circuits, digital circuits and power supply circuits.

1 Design of analog circuits
1.1 Design of preamplifier circuits
Except for a few ADCs on the market that have amplifier circuits themselves, most ADCs do not have this structure. The analog input signal of the general analog/digital conversion system is relatively small, so an analog amplifier is usually required to increase the input voltage. Analog amplifiers generally use integrated operational amplifiers, instrumentation amplifiers or isolation amplifiers. When using analog amplifiers, it is important to consider the bandwidth and accuracy of the amplifier. When selecting an operational amplifier, its bandwidth and accuracy should be better than the selected ADC.
Analog amplifiers can not only amplify analog input signals, but also have the function of impedance change. For ADCs with relatively small input resistance and relatively large internal resistance of the signal source, it is necessary to use an amplifier with high input impedance and low output impedance. Sometimes a voltage follower can also be added to increase the input impedance to achieve the purpose of matching.
1.2 Design of Sample and Hold Circuit
The sample and hold circuit can keep the voltage of the ADC converter unchanged during the conversion period. Therefore, for ADC without sample and hold circuit, it is necessary to add a sample and hold circuit before the analog input. When selecting a sample and hold device, attention should be paid to the selection of capture time and top rate, because they are directly related to the overall performance of the analog/digital conversion system. The capture time is essentially the time required for the sampling stage of the sample and hold device. It should be reasonably coordinated with the conversion time of the ADC. If it is too large, it will affect the conversion rate of the ADC. If it is too small, it is easy to cause functional confusion or data loss.
During the conversion process of the ADC, the sample and hold circuit enters the holding stage. Usually, the sample and hold circuit relies on capacitors to hold the voltage. Due to the influence of leakage current in the capacitor and sampling switch and bias current in the holding circuit, the analog voltage held will decrease (or increase) with the continuation of time. The rate of its decrease is the top rate of the sample and hold circuit. If the top rate is too large, the conversion accuracy will be affected. The top rate and capture time are not only related to the sample and hold circuit, but also to the external holding capacitor. When the capacitor is increased, the top rate can be reduced, but the capture time will increase, so it needs to be considered comprehensively. For systems where the analog input voltage changes slowly, the sample-and-hold circuit can be omitted. Generally, when the analog input voltage changes no more than 1/2LSB, it can be omitted.
1.3 Design of multiplexer
Multiplexer is also one of the main peripheral devices of ADC. The following issues should be noted during design: In practice, the input resistance of some ADCs is small, while the analog multi-way switch is not an ideal switch and has a large on-resistance. Therefore, the impedance between the ADC and the analog multi-way switch is not matched, which will affect the operating accuracy of the entire system, so it cannot be ignored. At this time, a voltage follower with high input impedance can be added between the multi-way switch and the ADC; In addition, there is leakage current in the analog multi-way switch, and each switch is connected in parallel. When the number of switches is large, the leakage current cannot be ignored. At this time, a hierarchical analog switch can be used to solve this problem; In a multi-channel data acquisition system, when the channel is switched, the analog voltage will produce a step change. At this time, the sampling and holding circuit should enter the sampling stage after the step change is stable; The ADC with a hierarchical pipeline structure and the ∑-△ type ADC have a lagging output data, so it is necessary to fully consider the stabilization time required by the converter peripheral circuit and the response time required by the ADC to the step change of the multi-way switch.

2 Design of digital peripheral circuits
The output of the ADC is a digital circuit. The data lines required to connect it to the subsequent circuit can be divided into two types: parallel interface and serial interface.
2.1 Design of parallel interface circuit
Most ADC data outputs have parallel interfaces, which can be easily connected to the data bus of the lower circuit (microprocessor, etc.), and the data transmission speed is fast. The data bus of ADC is commonly 8-bit and 16-bit, but generally 10-16-bit ADC can be directly connected to 16-bit microcontrollers with 16-bit interface mode, and can also be connected to 8-bit microcontrollers with 8-bit interface mode. In addition to parallel data lines, parallel interfaces also require many control signal lines and status signal lines, such as start conversion signal lines, read/write signal lines, chip select signal lines, etc. Since the chips of various ADCs are different, when designing, it is necessary to clarify the definition of each signal, timing, and bus timing of the microcontroller used for the specific model, so as to design an interface circuit that meets the timing requirements.
2.2 Design of serial interface circuit
The serial interface only requires one bidirectional data line, or two data lines with opposite transmission directions and a small number of control lines. This can greatly reduce the number of pins of the chip, thereby simplifying the wiring of the entire machine. In practice, most microcontrollers have serial interfaces, which provides convenient conditions for the use of ADCs with serial data output. However, this transmission method is slow and inefficient. However, with the increase of chip operating frequency, the serial transmission rate has also been improved. Common serial interfaces include universal asynchronous receiver/transmitter, serial peripheral interface and I2C bus, etc. The corresponding method should be adopted according to the specific situation when designing.

3 Design of power supply and grounding
The ADC circuit contains both analog and digital signals, and the analog signal part is a precise signal processing circuit. For example, the ADC with a resolution of 10 bits and a range of 5V corresponds to an analog voltage of 4.88mV for 1LSB. The digital circuit part is connected with other logic circuits, and the working signal is a pulse signal with a large amplitude and a wide spectrum. For analog signals, digital signals are a source of interference, and ground noise can reach tens of millivolts or even hundreds of millivolts. If there are factors such as poor grounding and improper wiring, digital noise will seriously affect the accuracy of the analog signal part and even make it unable to work. Therefore, for high-speed ADC or high-resolution conversion systems, special attention should be paid to the wiring of printed circuit boards and the decoupling of power supplies. In order to reduce ground noise interference, the following measures can be taken:
3.1 Design of reference point
AGND is separated from DGND, an analog reference point is established, and all analog parts are connected to this reference point. In addition, attention should be paid to reasonable layout, shortening the length of the ground wire as much as possible, and increasing the cross-sectional area of ​​the ground wire.
3.2 Design of AGND and DGND connection
AGND is connected to the analog reference point, DGND is connected to the digital circuit and connected to the digital power ground, and AGND and DGND are only connected at one pin close to the ADC.
3.3 Design of power supply wiring
Most ADCs use more than one power supply, usually 5 V power supply for the digital part and 15 V power supply for the analog part. These two sets of power supplies should be connected to AGND and DGND respectively, and it should be noted that the transformer windings of these two sets of power supplies should have good insulation and good electrostatic isolation.
3.4 Design of power supply decoupling
The power supply of the ADC should be added with decoupling capacitors, and the capacitors should be installed as close to the power supply of the ADC as possible. In general, the capacitors can be connected in parallel with 1~10μF tantalum capacitors and 0.01~0.1μF high-frequency ceramic capacitors.
3.5 Design of high and low noise circuit grounding
The high-frequency signal circuit and high-current circuit in the digital circuit belong to high-noise circuits, while the digital signal in the ADC interface belongs to low-noise circuits, so both should have ground reference points. The above are issues that need to be considered when connecting the ground wire, but in practice, the circuit structures and parameters vary greatly, so the same mode cannot be adopted in general. For some ADC chip manuals, the power supply and ground wires as well as the printed circuit wiring diagram of the chip evaluation board have been given. When using, they should be connected according to the manual, so as to achieve the expected indicators of the system.

4 Signal isolation design
From the above analysis, it can be seen that reasonable wiring and grounding can effectively suppress noise interference, but since analog signals and digital signals still have a common ground, it is impossible to completely eliminate the influence of digital noise on analog signals. In addition, analog signals are also susceptible to interference on transmission lines. These interferences not only affect analog signals, but also have a greater impact on digital circuits, and in severe cases, operation errors will occur. Therefore, isolation measures can further suppress interference. The commonly used isolation element is the optocoupler. According to the different isolation positions, it can be divided into two isolation methods: one is to isolate the analog signal end; the other is to isolate the digital signal end. Since the working frequency of digital signals is high, high-speed photocouplers must be used or acceleration measures must be taken, and waiting cycles or signal latches must be added to the microprocessor to coordinate the delay time caused by the photocoupler, which will bring about the complexity of the interface circuit and reduce the negative impact of system response speed. In practical applications, due to the different technical requirements for different systems, the design of ADC peripheral circuits must also adopt different methods according to specific circumstances.