Universal Serial Bus (USB) is a fast, bidirectional, synchronous, dynamically monitored serial interface, widely used in personal computer peripheral connections. USB supports real-time voice, audio data and video data transmission. At present, USB HUB (Universal Serial Bus Hub) contains USB HUB and functional components. USB devices continue to emerge. Therefore, a high-performance, high-speed data transmission is required between the USB host and complex peripheral devices. SMSC's USB251x series USB 2.0 hub controllers are multi-functional, cost-effective and low power. The hub controller uses innovative MultiTRAK technology to provide industry-leading data throughput in mixed-speed USB environments, and is suitable for providing USB port expansion for applications that require low power consumption, small size and high performance.
2 USB2514i Introduction
USB2514i is a USB25lxi-temp series device, with 1 USB upstream port and 4 USB downstream ports. It is an industrial USB2.0 HUB device. The maximum operating current of each downstream port can be 500 mA, and the maximum speed is 480 Mb/s. It also proposes a third high-speed transmission rate based on full-speed USB1.1 (transmission rate of 12 Mb/s) and low-speed USB1.0 (transmission rate of 1.5 Mb/s). USB2.0 is fully compatible with USB1.1 and USB1.0. USB HUB supports multiple USB external devices with different properties, and the hierarchical star topology supports up to 127 external devices, providing USB users with a convenient and simple connection method. At the same time, USB2514i also supports hot plugging, that is, users can directly plug in or unplug devices without shutting down.
The main features of the USB2514i are as follows: 4 downstream ports; 4 high-performance transaction converters; 36-pin QFN and 48-pin QFN packages; compatible with the packages of USB2513i and USB2512i (36-pin QFN); support for industrial-grade temperature range of -40℃ to 85℃: MultiTRAK-transfer translator per port, which can provide optimal data throughput in mixed-speed USB environment; lower operating voltage (5 V); on-chip power-on reset; integrated 1.8 V voltage regulator; fully integrated USB termination and pull-up/pull-down resistors; on-board 24 MHz crystal oscillator driver or external 24 MHz clock input; USB host/device speed indicator, each port has a 3-color LED driver to indicate the connection speed of the USB host/device; among them, high speed (480 Mb/s), full speed (12 Mb/s), low speed (1.5 Mb/s) (48-pin QFN package); enhanced EMI suppression and ESD protection.
3 USB2514i Internal Structure
The internal structure block diagram of USB2514i is shown in Figure 1, which includes a repeater (HUB Repeater), a controller (HUB Controller) and a transaction translator (TT). USB2514i works in three states: signal transmission, restart and wait, and supports three transmission rates: high speed, full speed and low speed. Its transmission rate depends on the connection status of the upstream port system facing the host and the transmission status of the peripheral device of the HUB downstream port facing the USB device. When the HUB upstream port is connected to a high-speed system, the HUB must work in a high-speed state; when the HUB upstream port is connected to a full-speed system, the HUB must work in a full-speed state. The HUB Repeater is responsible for the connectivity of the HUB upstream port and the HUB downstream port working at the same transmission rate. The HUB Repeater must have one port connected to the upstream port and one or more ports connected to the downstream port. The HUB Controller provides status and control from the host to the HUB. When the HUB is operating at high-speed transmission and full-speed or low-speed peripheral devices are connected to the HUB, the processing translator classifies and processes the high-speed signal and translates it into full-speed or low-speed processing signals. When a peripheral device is connected to the downstream port of the HUB, the working rate determines whether its routing logic is connected to the HUB repeater or the HUB processing translator.
SIE is mainly responsible for protocol parsing at the physical layer and protocol layer, and the controller is mainly responsible for protocol parsing at the device layer. The buffer is the bridge for communication between SIE and the controller. SIE stores the received data packets in the buffer for the controller to read, and the controller stores the data to be sent in the buffer for SIE to read.
The main functions of the SIE module include: packet parsing and organization, PID detection and generation, CRC checksum identification and generation, address detection, data serial/parallel and parallel/serial conversion, bit filling and extraction, NRZI encoding and decoding, clock and data separation, etc. There are multiple asynchronous clock areas in the SIE. A typical SIE includes the following clock areas: the host's 12 MHz clock, which is the data clock extracted from the received data stream. The local 48 MHz global clock and the local 12 MHz transmit clock (obtained by dividing the 48 MHz global clock by 4). The interface clock between the SIE and other modules is mainly the read and write handshake signal between the SIE and the controller regarding the buffer and interface registers.
The most difficult clock area to synchronize is the local clock and the host clock. The local clock and the host clock are generated by two different crystal oscillators, and there may be an error of ±0.25 between them, so the SIE must use an appropriate method to achieve bit synchronization. A typical bit synchronization method is to use a digital phase-locked loop (PLL) with a specific structure.
4 Application circuit of USB2514i
4.1 Application Circuit
Figure 2 shows the application circuit of USB2514i. The external power supply voltage of the circuit is 5 V, which is converted to 3.3 V by PQlL333M2SP. The power supply pins of the four USB downstream ports pass through two MIC20261BMs, which have a current limiting protection circuit inside. When the current is too large due to short circuit or other reasons, MIC20261BM can automatically cut off the power supply pins of the USB downstream port, thereby effectively protecting the device and load. Whether the USB downstream port is enabled can be controlled by setting whether the data pins (D+, D-) of the USB downstream port are pulled up.
4.2 PCB Design
In PCB design, we should focus on how to improve the transmission quality of USB2.0 signals and reduce electromagnetic interference (EMI) and electrostatic interference (ESD). In circuit design, in order to reduce high-frequency interference and improve the transmission quality of high-speed signals, as many decoupling capacitors as possible should be placed between the digital power supply and the digital ground; more bypass capacitors should be placed near USB2.0, and if surface mount capacitors are used, the soldering points should be expanded as much as possible. In PCB design, first limit the length of the two differential pairs of USB2.0 signal lines D+/D- and the high-speed clock line to make the wiring as short as possible; keep the D+/D-2 signal lines the same and always parallel; and increase the distance between each pair of signal lines and between each pair of signal lines and other signal lines as much as possible. The farther the distance between the two differential pair signal lines D+/D- and the high-speed clock line is, the better; when possible, route the USB2.0 signal line close to the common ground layer; do not route the USB under the crystal oscillator, clock, magnetic device or IC; when only 90° corner wiring can be used, two 45° corners can be used instead of one 90° corner.
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Recommended ReadingLatest update time:2024-11-17 06:00
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