Parasitic Effects and Stray Capacitance of Capacitors

Parasitic Effects and Stray Capacitance of Capacitors

Parasitic Effects of Capacitors

Q: I want to know how to choose the right capacitor for a specific application, but I don't know what the advantages and disadvantages of the many different types of capacitors are?
A: It is actually not difficult to choose the right type of capacitor for a specific application. Generally speaking, most capacitors are usually divided into the following four types according to the application classification (see Figure 14.1):

· AC coupling, including bypassing (passing AC signals while blocking DC signals)
· Decoupling (filtering AC signals or filtering high-frequency signals superimposed on DC signals or filtering low-frequency components in power supplies, reference power supplies and signal circuits)
· Active or passive RC filtering or frequency selection networks
· Analog integrators and sample-and-hold circuits (capturing and storing charge)
Although there are more than a dozen popular capacitors, including polyester capacitors, film capacitors, ceramic capacitors, and electrolytic capacitors, there are usually only one or two most suitable capacitors for a specific application, because other types of capacitors either have obvious imperfections in performance or have "parasitic effects" on system performance, so they are not used.

Q: What is the "parasitic effect" you are talking about?

A: Unlike "ideal" capacitors, "real" capacitors are characterized by additional "parasitic" elements or "non-ideal" performance, which manifests itself in the form of resistance and inductance, nonlinearity and dielectric storage performance. The "real" capacitor model is shown in Figure 14.2. The characteristics of the capacitor determined by these parasitic elements are usually detailed in the product specifications of the capacitor manufacturer. Understanding these parasitic effects in each application will help you choose the right type of capacitor.

Figure 14.2 "Real" capacitor model

Q: So what are the most important parameters that characterize the performance of non-ideal capacitors?
A: There are four most important parameters: capacitor leakage resistance RL (equivalent parallel resistance EPR), equivalent series resistance (ESR), equivalent series inductance (ESL), and dielectric storage (absorption).
Capacitor leakage resistance, RP: RP is an important parameter in AC coupling applications, storage applications (such as analog integrators and sample-and-holds), and when capacitors are used in high impedance circuits. The leakage model of the capacitor is shown in Figure 1 4.3.

Figure 14.3 Leakage model of capacitor
The charge in an ideal capacitor should change only with the external current. However, RP in a real capacitor causes the charge to leak slowly at a rate determined by the R?C time constant.

Electrolytic capacitors (tantalum capacitors and aluminum capacitors) have large capacitance and due to their low isolation resistance, the leakage current is very large (typically 5 to 20nA/μF), so they are not suitable for storage and coupling.
The most suitable capacitors for AC coupling and charge storage are polytetrafluoroethylene capacitors and other polyester types (polypropylene, polystyrene, etc.) capacitors.

Equivalent Series Resistance (ESR), R ESR: The equivalent series resistance of a capacitor is the resistance of the capacitor leads in series with the equivalent resistance of the capacitor plates. When a large AC current flows through the capacitor, R ESR causes the capacitor to dissipate energy (and thus losses). This can have serious consequences for RF circuits and power supply decoupling capacitors that carry high ripple currents. However, it does not have a significant impact on precision high impedance, small signal analog circuits. The capacitors with the lowest R ESR are mica capacitors and film capacitors.

Equivalent Series Inductance (ESL), L ESL: The equivalent series inductance of a capacitor is the inductance of the capacitor leads in series with the equivalent inductance of the capacitor plates. Like R ESR, L ESL can cause serious problems in RF or high frequency operating environments, even though the precision circuit itself works normally under DC or low frequency conditions. The reason for this is that transistors in precision analog circuits have gain when transition frequencies extend to hundreds of megahertz or several gigahertz, and can amplify resonant signals with very low inductance values. This is the main reason why the power supply side of such a circuit must be properly decoupled at high frequencies.

Electrolytic capacitors, paper capacitors, and plastic film capacitors are not suitable for high-frequency decoupling. These capacitors are basically made of two metal foils separated by multiple layers of plastic or paper dielectric and then rolled into a roll. Capacitors of this construction have considerable self-inductance and act mainly as inductors when the frequency exceeds a few megahertz. A more suitable choice for high-frequency decoupling would be monolithic ceramic capacitors because they have very low equivalent series inductance. Monolithic ceramic capacitors are made of multiple layers of sandwiched metal film and ceramic film, and these multiple layers of film are arranged in parallel with busbars instead of being wound in series. The

disadvantage of monolithic ceramic capacitors is that they have microphonic noise (i.e., they are sensitive to vibration), so some monolithic ceramic capacitors may appear self-resonant and have a very high Q value because the series resistance and the inductance together with it are very low. In addition, disc ceramic capacitors, although not too expensive, sometimes have very high inductance.

Q: In the capacitor selection table, I see the term "dissipation factor". What does it mean?

A: Yes. Because the leakage resistance, equivalent series resistance, and equivalent series inductance of a capacitor are almost always difficult to separate, many capacitor manufacturers combine them into a single specification called the dissipation factor, or DF, which is used to describe the inefficiency of a capacitor. The dissipation factor is defined as the ratio of the energy lost per cycle to the energy stored in the capacitor. In practice, the dissipation factor is equal to the power factor of the dielectric or the cosine of the phase angle. If the high-frequency losses of the capacitor over the frequency band of interest can be simplified to a series resistance model, then the ratio of the equivalent series resistance to the total capacitive reactance is a good estimate of the dissipation factor, that is, DF ≈ ω RESRC. It can also be shown that the dissipation factor is equal to the inverse of the capacitor's quality factor, or Q value, and this specification is sometimes given in the capacitor manufacturer's product specifications. Dielectric Absorption, R DA , C DA : Monolithic ceramic capacitors are very suitable for high-frequency decoupling, but dielectric absorption issues make them unsuitable as holding capacitors in sample-and-hold amplifiers. Dielectric absorption is a hysteresis-like internal charge distribution that causes a capacitor that is rapidly discharged and then open-circuited to recover a portion of its charge, see Figure 14-4. Because the amount of charge recovered is a function of the original charge, this is actually a charge memory effect. If such a capacitor is used as a holding capacitor

in a sample-and-hold

amplifier, it will inevitably cause errors in the measurement results. The capacitors recommended for this type of application are, as mentioned earlier, polyester capacitors, namely polystyrene capacitors, polypropylene capacitors, and polytetrafluoroethylene capacitors. These capacitors have very low dielectric absorption (typical values ​​<0.01%). See Table 14-1 for a comparison of common capacitor characteristics.

General note on high-frequency decoupling:

The best way to ensure proper decoupling of analog circuits at both high and low frequencies is to use electrolytic capacitors, such as a tantalum chip capacitor in parallel with a monolithic ceramic capacitor. The two capacitors in parallel not only provide good decoupling performance at low frequencies, but also maintain excellent performance at very high frequencies. It is generally not necessary to connect a tantalum capacitor to each integrated circuit except for critical integrated circuits. If the length of the relatively wide printed circuit board conductive strip between each integrated circuit and the tantalum capacitor is less than 10cm, a tantalum capacitor can be shared between several integrated circuits.

Another issue that needs to be explained about high-frequency decoupling is the actual physical layout of the capacitor. Even very short leads have non-negligible inductance, so high-frequency decoupling capacitors should be installed as close to the integrated circuit as possible, with short leads and wide printed circuit board conductive strips.

To eliminate lead inductance, high-frequency decoupling capacitors should ideally be surface-mount components. As long as the capacitor lead length does not exceed 1-5mm, it is still better to choose end-lead capacitors (wire-ended capacitors). The correct use of capacitors is shown in Figure 14-5.

(a) Correct method (b) Incorrect method
· Use low inductance capacitors (monolithic ceramic capacitors)
· Mount capacitors close to the IC
· Use surface mount capacitors
· Short leads, wide conductive strips

Figure 14-5 Correct use of capacitors Stray capacitance

We have discussed the parasitic behavior of capacitors as components

. Table 14-1 Comparison of performance of various capacitor devices Type Typical dielectric absorption Advantages Disadvantages NPO ceramic capacitors Absorption <0?1% Small size, cheap, good stability, wide capacitance range, many sellers, low inductance Usually very low, but cannot be limited to a very small value (10nF) Polystyrene capacitors 0?001%~0?02% Cheap, very low DA, wide capacitance range, good stability Capacitors are damaged when the temperature is above 85°C, large size, high inductance Polypropylene capacitors 0?001%~0?0 2% Cheap, very low DA, wide capacitance range Capacitors are damaged when the temperature is above +105°C, large size, inductance Polytetrafluoroethylene capacitors 0?003%~ 0?02% Very low DA, good stability, can work at temperatures above +125°C, wide Quite expensive, large size, high inductance MOS capacitors 0?01% good DA performance, small size, can operate above +25°C, low inductance Limited supply, only small capacitance values Polycarbonate capacitors 0?1% good stability, low price, wide temperature range Large size, DA limited to 8-bit applications, high inductance Polyester capacitors 0?3%~0?5% medium stability, low price, wide temperature range, low inductance Large size, DA limited to 8-bit applications, high inductance Monolithic ceramic capacitors (high k value) >0?2% low inductance, wide capacitance range Poor stability, poor DA performance, high voltage coefficient Mica capacitors >0?003% low high frequency loss, low inductance, good stability, efficiency better than 1% large size, low capacitance value (<10nF), expensive Aluminum electrolytic capacitors are very high High capacitance value, high current, high voltage, small High leakage, usually polarized, poor stability, low precision, inductive Tantalum electrolytic capacitors are very high Small size, high capacitance, moderate inductance High leakage, usually polarized, expensive, poor stability, poor precision Let's discuss another parasitic effect called "stray" capacitance. Q: What is stray capacitance? A: Like a parallel plate capacitor, (see Figure 14?6) whenever two conductors are very close to each other (especially when the two conductors are parallel), stray capacitance is generated. It cannot be continuously reduced, nor can it be shielded by conductors like Faraday shielding. C=0.0085×ER×Ad Where: C=capacitance, pF ER=air dielectric constant A=parallel conductor area, mm2 d=distance between parallel conductors, mm Figure 14-6 Parallel plate capacitor model Stray capacitance or parasitic capacitance generally appears between parallel conductive strips on a printed circuit board or between conductive strips or conductive planes on opposite sides of a printed circuit board, see Figure 14-7. The existence and role of stray capacitance, especially at high frequencies, are often overlooked in circuit design, so serious performance problems will occur during the manufacture and installation of system circuit boards, such as increased noise, reduced frequency response, and even system instability. An example is used to illustrate how to use the above capacitance formula to calculate the stray capacitance generated by conductive strips on opposite sides of a printed circuit board. For ordinary printed circuit board materials, ER =4-7, d=1-5mm, then its unit area stray capacitance is 3pF/cm2. At 250MHz, the reactance corresponding to a 3pF capacitor is 212-2Ω. Q: How can I eliminate stray capacitance? A: In fact, stray capacitance can never be eliminated. The best way is to try to minimize the effect of stray capacitance on the circuit.

Q: So how can we reduce stray capacitance?
A: One way to reduce the effects of stray capacitance coupling is to use a Faraday shield, which is a simple grounded conductor between the coupling source and the affected circuit.

Q: How does stray capacitance work?
A: Let's look at Figure 14-8. The figure shows how a high-frequency noise source, VN, couples to the equivalent capacitance of the system impedance, Z, through stray capacitance, C. If we have little or no control over VN, or cannot change the position of the circuit impedance, Z1, then the best solution is to insert a Faraday shield. Figure 14-9 shows how the Faraday shield interrupts the coupled electric field.

Figure 14-8 Voltage noise coupled through stray capacitance (a) Capacitive shield interrupts the coupled electric field (b) Capacitive shield causes the noise current to return to the noise source instead of through impedance Z1

Figure 14-9 Faraday Capacitor Shield

Note that the Faraday shield returns noise and coupled currents directly to the noise source rather than through impedance Z1.
Another example of capacitive coupling is the copper-plated ceramic integrated circuit package. This DIP package has a small square conductive Kovar cover on top of the ceramic package, which is soldered to a metallized rim (see Figure 14-10). Manufacturers only offer two package options: one that connects the metallized rim to a pin on the corner of the device package; the other that leaves the metallized rim unconnected. Most logic circuits have a ground pin on one of the corners of the device package, so the Kovar cover of this device is grounded. However, many analog circuits do not have a ground pin on the four corners of the device package, so this · Copper-plated ceramic DIP package, sometimes with an isolated Kovar cover · This packaged device is susceptible to capacitive interference and should be grounded as much as possible
Figure 14-10 Capacitive effect caused by the Kovar cover This Kovar cover is suspended. It can be shown that if the chip of such a ceramic DIP package is not shielded, it is more susceptible to damage from electric field noise than the same chip in a plastic DIP package.

Regardless of the ambient noise level, the best user's best practice is to ground any copper-plated ceramic packaged integrated circuit that is not grounded by the manufacturer. The leads can be soldered to the Kovar cap to achieve grounding (this will not damage the chip because the chip and the Kovar cap are thermally and electrically isolated). If soldering to the Kovar cap is not possible, use a grounded phosphor bronze sheet to make the ground connection, or use conductive paint to connect the Kovar cap to the ground pin. Never ground a Kovar cap without checking that it is not actually allowed to be connected to ground. Some devices should connect the Kovar cap to the power supply terminal instead of to ground, which is the case. Faraday shielding cannot be used between the bond wires of an integrated circuit chip. The main reason is that the stray capacitance between the two bond wires of the chip and the lead frame to which they are connected is about 0.2pF (see Figure 14.11). The observed value is generally between 0.05pF and 0.6pF.
Figure 14.11 Stray capacitance between chip bond wires Consider a high-resolution data converter (ADC or DAC) that is connected to a high-speed data bus. Each line on the data bus (which transmits noise at a rate of about 2 to 5V/ns) affects the analog port of the ADC or DAC through the above stray capacitance (see Figure 14.12). The resulting digital edge coupling will inevitably degrade the performance of the converter.

Figure 14-12 Digital noise on a high-speed data bus enters the analog port of a data converter through stray capacitance

To avoid this problem, do not connect the data bus directly to the data converter, but use a latch buffer as an interface. This latch buffer acts as a Faraday shield between the fast data bus and the high-performance data converter. Although this method adds additional components, increases the device footprint, increases power consumption, slightly reduces reliability, and slightly increases design complexity, it can significantly improve the converter's signal-to-noise ratio.