Analysis of the configuration process of Linux transplantation

The Linux transplantation process has been listed in the transplantation steps of Linux transplantation. Now let's analyze the Linux configuration process. The following two configuration processes will be analyzed:

1. Make s3c2410_defconfig analysis

2. Make menuconfig analysis

1. Make s3c2410_defconfig analysis

First, start analyzing from the top-level Makefile and find a target similar to smdk2410_defconfig. Found the %config target. This means that targets with the suffix config follow this rule. The config in front of %config is a Kconfig keyword, indicating the beginning of a configuration option.

416 config %config: scripts_basic outputmakefile FORCE

417 $(Q)mkdir -p include/linux include/config

418 $(Q)$(MAKE) $(build)=scripts/kconfig $@

Continue to analyze the dependencies of the s3c2410_defconfig target scripts_basic outputmakefile FORCE

①, scripts_basic dependency analysis, it is also a target. It has no dependencies, where Q means if V=1 is entered in the command parameter, Q=empty, which means printing this rule, otherwise not printing this rule; MAKE=make is defined in the system parameters.

328 scripts_basic:

349 $(Q)$(MAKE) $(build)=scripts/basic

The build variable is a general variable, which is defined in the $(srctree)/scripts/Kbuild.include file, where srctree is the directory where the Linux kernel is located.

121 build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj

Translate the scripts_basic dependency to

scripts_basic:

make -f $(srctree)/scripts/Makefile.build obj=scripts/basic

It means entering the Makefile.build file make, and the obj parameter is scripts/basic. Then open the Makefile.build file for analysis, and its goal is:

005 src := $(obj)

007 PHONY := __build

008 __build:

083 __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y))

084 $(if $(KBUILD_MODULES),$(obj-m))

085 $(subdir-ym) $(always)

086 @:

Next, analyze the role of src: $(srctree)/scripts/Makefile.build includes the Makefile in the src (i.e. scripts/basic) directory (if there is Kbuild, it includes Kbuild)

16 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))//kbuild-dir=scripts/basic

17 include $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, $(kbuild-dir)/Makefile) // If Kbuild exists, include Kbuild, otherwise protect Makefile

Back to the final goal: the command of the rule is a colon command ":". The colon (:) command is a built-in command of bash and is usually regarded as a true command. The help explanation of bash (help :) is: No effect; the command does nothing. A zero exit code is returned. (No effect, the command is a no-op, and the exit status is always 0).

Except for $(always), (builtin−target)(lib-target) (extra−y)(subdir-ym), the variables of __build are not defined in $(srctree)/scripts/basic/Makefile, so builtin-target, lib-target, extra-y, and subdir-ym are all empty strings, and only always has a value. always is defined as dochecklxdialog in scripts/kconfig/Makefile, and the comment of the rule where the dochecklxdialog target is located reads # Check that we have the required ncurses stuff installed for lxdialog (menuconfig). In other words, the dependency dochecklxdialog of the build target is used to check whether the ncurses library required to generate the configuration dialog box has been installed on the local machine. If not, the make process will report an error and exit. Therefore, before making menuconfig, we must ensure that the library has been installed locally.

The above text is copied from the analysis of the execution process of make menuconfig when configuring the Linux Kernel. In summary, the scripts_basic dependency is used to check whether the ncurses library has been installed on the local machine. This library is needed when generating the menuconfig interface.

②, outputmakefile dependency analysis, it is also a target, no dependency. If KBUILD_SRC is not empty, the rule is executed. KBUILD_SRC is empty, so it is not executed

358 outputmakefile:

359 ifneq ($(KBUILD_SRC),)

360 $(Q)$(CONFIG_SHELL) $(srctree)/scripts/mkmakefile

361 $(srctree) $(objtree) $(VERSION) $(PATCHLEVEL)

362 endif

③、FORCE dependency analysis, it is also a goal. As follows:

1491 PHONY += FORCE

1492 FORCE:

From the above, we can see that FORCE has neither dependent rules nor executable commands under it. If a rule has no commands or dependencies, and its target is not an existing file name. When executing this rule, the target is always considered to be the latest. That is to say: once this rule is executed, make thinks that its target has been updated. When such a target is used as a dependency of a rule, because the dependency is always considered to be updated, the command defined in the rule where the dependency is located will always be executed. The rule where FORCE is located is empty, and nothing is done. FORCE is defined as a pseudo-target, so it is always considered to be the latest (newer than the target) when it is a dependency, so the target with FORCE as a dependency will be regenerated every time make is run. Here, the rule command of the FORCE pseudo-target is empty, so FORCE is equivalent to a keyword in the Kbuild system. If we want a target to be regenerated every time make is run, we write FORCE as the dependency of the target.

The above text is copied from the analysis of the make menuconfig execution process when configuring the Linux Kernel.

④. Then analyze the first rule $(Q)mkdir -p include/linux include/config, which means creating two folders include/linux include/config

⑤. Finally, analyze the second rule $(Q)$(MAKE) $(build)=scripts/kconfig $@ and expand it to get:

make -f $(srctree)/scripts/Makefile.build obj=scripts/kconfig smdk2410_defconfig

The above rule means calling the Makefile.build file, and the final target is s3c2410_defconfig. From the analysis of the first item above, we can know that the Makefile.build file contains scripts/kconfig/Makefile, and s3c2410_defconfig is defined in this file:

66 %_defconfig: $(obj)/conf

67 $(Q)$< -D arch/$(ARCH)/configs/$@ arch/$(ARCH)/Kconfig

Expand to:

66 s3c2410_defconfig: scripts/kconfig/conf

67 scripts/kconfig/conf -D arch/arm/configs/s3c2410_defconfig arch/arm/Kconfig

It means that the conf program is generated first, and then the conf program is used to parse the s3c2410_defconfig file and the Kconfig file to configure the board, and finally the .config file is generated for calling when making uImage.

1. Make menuconfig analysis, this target is consistent with the s3c2410_defconfig target, both are %config, so only the final stage of analysis, calling the Makefile.build file, including scripts/kconfig/Makefile, and menuconfig is defined in this file:

13 menuconfig: $(obj)/mconf

14 $< arch/$(ARCH)/Kconfig

Therefore, the command of the menuconfig target rule is scripts/kconfig/mconf arch/arm/Kconfig. mconf is actually an executable file in the scripts/kconfig directory. In this command, the arch/arm/Kconfig string is passed as a command line parameter to the executable file to run. If the executable file has .config content, the configuration interface is generated based on the .config content file; otherwise, the configuration interface is generated based on the menu configuration provided by the arch/arm/Kconfig file.

NOTE: Why is scripts/kconfig/mconf an executable file? Continue to read the content of scripts/kconfig/Makefile:

lxdialog := lxdialog/checklist.o lxdialog/util.o lxdialog/inputbox.o

lxdialog += lxdialog/textbox.o lxdialog/yesno.o lxdialog/menubox.o

conf-objs := conf.o zconf.tab.o

mconf-objs := mconf.o zconf.tab.o $(lxdialog)

kxgettext-objs := kxgettext.o zconf.tab.o

hostprogs-y := conf qconf gconf kxgettext

ifeq ($(MAKECMDGOALS),menuconfig)

hostprogs -y += mconf

endif

ifeq ($(MAKECMDGOALS),xconfig)

qconf-target := 1

endif

ifeq ($(MAKECMDGOALS),gconfig)

gconf-target := 1

endif

ifeq ($(qconf-target),1)

qconf-cxxobjs := qconf.o

qconf-objs := kconfig_load.o zconf.tab.o

endif

If you need to compile some executable files for use in the kernel compilation stage during the kernel compilation process, you need to use the native program support feature of the Kbuild framework. In the Kbuild framework, the hostprogs-y variable is used specifically to indicate some executable files that need to be used in the kernel compilation stage. Through hostprogs-y += mconf, it indicates to the make program that mconf is an executable file that needs to be used in the compilation stage. In addition, the Kbuild framework uses the -objs suffix to indicate that the corresponding executable file needs to be linked and generated through multiple target files. mconf-objs := mconf.o zconf.tab.o $(lxdialog) indicates to make that the mconf file is generated by linking mconf.o zconf.tab.o lxdialog/checklist.o lxdialog/util.o lxdialog/inputbox.o lxdialog/textbox.o lxdialog/yesno.o lxdialog/menubox.o. Furthermore, when the generation rules are not explicitly stated, the Kbuild framework assumes that the .o file is compiled from the .c or .S file with the same name.

After saving the configuration information, a .config file will be generated in the kernel root directory, which saves the kernel configuration information.