micro2440 uses the S3C2440 processor (which is not much different from the S3C2410). In its Linux source code, the code related to this platform is mainly in arch/arm/mach-s3c2410 and include/asm-arm/arch-s3c2410, and the related drivers are in the drivers directory.
(1) DM9000 network card driver
kernel-2.6.13/drivers/net/dm9000x.c
(2) Serial port (including three serial port drivers 0, 1, 2, corresponding to the device name /dev/tts/0, 1, 2)
kernel-2.6.13/drivers/serial/s3c2410.c
(3) Real-time clock RTC driver
kernel-2.6.13/drivers/char/s3c2410-rtc.c
(4) LED driver
kernel-2.6.13/drivers/char/qq2440_leds.c
(5) Button driver
kernel-2.6.13/drivers/char/qq2440_buttons.c
(6) Touch screen driver
kernel-2.6.13/drivers/input/touchscreen/s3c2410_ts.c
(7) Yaffs file system source code directory
kernel-2.6.13/fs/yaffs2
(8) USB mouse, keyboard source code
kernel-2.6.13/drivers/usb/input/hid-input.c
(9) SD/MMC card driver source code directory (in the 2.6.13 kernel, only SD cards with a capacity of less than 2G are supported)
kernel-2.6.13/drivers/mmc
(10) NandFlash driver
kernel-2.6.13/drivers/mtd/nand
(11) UDA1341 audio driver directory
kernel-2.6.13/sound/oss/uda1341.c
kernel-2.6.13/ drivers/l3
(12) LCD driver (including drivers of sizes of 3.5", 7", 8.4", 10.4", 12.4", 15")
kernel-2.6.13/drivers/video/s3c2410fb.c
(13) USB support driver
kernel-2.6.13/drivers/usb/storage
(14) Vimicro USB camera driver
kernel-2.6.13/drivers/usb/media/gspca
1.S3C2410_GPB5 is the port number, defined in regs-gpio.h,
#define S3C2410_GPIO_BANKB (32*1)
#defineS3C2410_GPIONO(bank,offset) ((bank) + (offset))
#defineS3C2410_GPB5 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 5)
S3C2410 has a total of 130 GPIOs, divided into 9 groups (GPA~GPJ), each group can have up to 32, each GPIO has 2~4 optional functions, and each group has 4 control register spaces. For example, for GPB, there are GPBCON, GPBDAT, GPBUP and Reserved, which are function configuration, data cache, pull-up enable and reservation respectively.
The S3C2410_GPB5 above is the GPIO number, that is, the position in the number space (0~32*9-1), bank is the base number of the group, and offset is the offset within the group.
2.S3C2410_GPB5_OUTP is the port function, defined in regs-gpio.h,
#define S3C2410_GPB5_INP (0x00 <<10)
#define S3C2410_GPB5_OUTP (0x01 <<10)
The 10th and 11th bits of GPBCON are used to configure the function of GPB5, 00 = Input, 01 = Output
3.S3C2410 GPIO operation functions
In the hardware.h file, there are:
s3c2410_gpio_cfgpin //Configure the GPIO function of the port
s3c2410_gpio_getcfg //Read function configuration
s3c2410_gpio_pullup //Configure the pull-up resistor
s3c2410_modify_misccr //Miscellaneous configuration
s3c2410_gpio_getirq //Given the port, convert the IRQ number
s3c2410_gpio_irqfilter //Configure whether IRQ filtering is enabled
s3c2410_gpio_setpin //Write data to the port
s3c2410_gpio_getpin //Read data from the port
The implementation of these functions is in gpio.h
void s3c2410_gpio_setpin(unsigned int pin, unsigned intto)
{
void __iomem *base = S3C2410_GPIO_BASE(pin);
unsignedlong offs = S3C2410_GPIO_OFFSET(pin);
unsigned longflags;
unsigned long dat;
local_irq_save(flags);
dat = __raw_readl(base + 0x04);
dat &= ~(1 <
__raw_writel(dat, base +0x04);
local_irq_restore(flags);
}
(My own understanding: dat = __raw_readl(base + 0x04); dat &= ~(1 << offs); dat |= to<< offs; For example, if the operation is on port 5, these sentences can ensure that other ports maintain their original values, and only the value of port 5 changes)
4.S3C2410_GPIO_BASE and S3C2410_GPIO_OFFSET are also defined in the regs-gpio.h file.
#define S3C2410_GPIO_BASE(pin) ((((pin) & ~31) >> 1) + S3C24XX_VA_GPIO)
#defineS3C2410_GPIO_OFFSET(pin) ((pin) & 31)
And in map.h there is:
#define S3C24XX_VA_GPIO S3C2410_ADDR(0x00E00000) //Virtual address S3C24XX_VA_GPIO=0xF0E00000
#define S3C2400_PA_GPIO (0x15600000)
#define S3C2410_PA_GPIO (0x56000000) //GPACON physical address
#defineS3C24XX_SZ_GPIO SZ_1M //0x100000 = 1024 *1024
The function of S3C2410_GPIO_BASE is to calculate the virtual base address of the group where the port belongs according to the port number pin. ((pin)&~31) removes the decimals less than or equal to 31 in the pin (clear the lower 5 bits to 0). The reason for >>1 is that there can be up to 32 ports in each GPIO group. Controlling these ports requires 4 register spaces, and 4 register spaces require 4*4=16 bytes for addressing. 32/16=2, which is just enough to shift left by one bit. In other words, the number difference between the previous group of ports and the next group of ports is 32, while the address difference of the control register is 16. (My own understanding: Because each GPIO port corresponds to 4 registers, each register is 32 bits, S3C2410_GPIO_BASE only calculates the virtual base address, no matter which specific port, 2 to the fifth power is exactly 32, ((pin)&~31) can mask the lower five bits, and the right shift is because the number of ports does not exceed 32. Each GPIO port corresponds to 4 registers, each register is 32 bits, 4*32/8=16=0x10, for example, GPIOA=0X10+S3C24XX_VA_GPIO, GPIOB=0X20+S3C24XX_VA_GPIO, the number of numbers represented by 0x10 exceeds 32)
The function of S3C2410_GPIO_OFFSET is to calculate the offset of the group to which the port belongs according to the port number pin. ((pin)& 31) means to remove the number greater than 31 (clear the bits above the 6th bit to 0).
5. __raw_readl和__raw_writel
Linux's I/O operations are defined in asm/io.h, and on the ARM platform, they are in asm-arm/io.h.
#define __raw_readl(a) (__chk_io_ptr(a), *(volatileunsigned int __force *)(a))
#define __raw_writel(v,a)(__chk_io_ptr(a), *(volatile unsigned int __force *)(a)= (v))
In includelinuxcompiler.h:
#ifdef __CHECKER__
……
extern void __chk_io_ptr(void__iomem *);
#else
……
# define __chk_io_ptr(x)(void)0
……
#endif
__raw_readl(a) is expanded to: ((void)0,*(volatile unsigned int _force*)(a)). When __CHECKER__ is defined, __chk_io_ptr is called first to check the address, otherwise __chk_io_ptr does nothing, and *(volatileunsigned int _force*)(a) returns the value at address a. The (void)xx approach is sometimes useful, for example, when the compiler turns on checking for unused parameters, it is necessary to do this to get the unused parameters to pass the compilation.
There are two ways to program the physical address of I/O in the CPU: one is I/O mapping, and the other is memory mapping. __raw_readl and __raw_writel are the original methods of operating I/O, and the derived operation methods are: inb, outb, _memcpy_fromio, readb, writeb, ioread8, iowrite8, etc.
6.local_irq_save和local_irq_restore
Disabling and enabling interrupts are defined in asm-arm/system.h.
#define local_irq_save(x)
({
__asm____volatile__(
"mrs %0,cpsr @ local_irq_saven"
"cpsid i"
: "=r" (x) : : "memory", "cc");
})
#define local_irq_save(x)
({
unsigned long temp;
(void)(&temp == &x);
__asm____volatile__(
"mrs %0,cpsr @ local_irq_saven"
" orr %1, %0,#128n"
" msr cpsr_c,%1"
: "=r" (x),"=r" (temp)
:
: "memory", "cc");
})
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