ARM assembly enters C function analysis, C function pushes stack, pops stack, passes parameters, and returns values

2 int main(void)

3 {

4 c: e52db004 push {fp}; (str fp, [sp, #-4]!)

5 10: e28db000 add fp, sp, #0

6 14: e24dd00c sub sp, sp, #12

7 int a;

8 a = 3;

9 18: e3a03003 mov r3, #3

10 1c: e50b3008 str r3, [fp, #-8]

11

12 return 0;

13 20: e3a03000 mov r3, #0

14 }

15 24: e1a00003 mov r0, r3

16 28: e28bd000 add sp, fp, #0

17 2c: e8bd0800 pop {fp}

18 30: e12fff1e bx lr

You can see that there is a pair of instructions that are reverse operations: push {fp}; add fp, sp, #0 <-------> add sp, fp, #0; pop {fp}. The code between this pair of instructions will not modify the value of fp, so that the value of fp sp before the call is restored. The instructions between them access the stack by modifying sp. But there is a problem here. I only defined an int variable here, so why is the stack offset 12 bytes downward? In theory, sp-4 is enough. The reason was not found. Although the Procedure Call Standard for the ARM Architecture requires several conventions to be followed for the stack, such as the stack pointer must be 4-byte aligned. In addition, for the public interface, that is, the global interface, sp is required to be 8-byte aligned. Here, my main is considered a public interface, so 8-byte alignment must be followed, but sp-4 is also 8-byte aligned. I don't understand why it is -12. Adding local variables can clearly see the 8-byte alignment convention.

Passing parameters

1 int foo(int a, int b, int c, int d)

2 {

3 int A,B,C,D;

4 A = a;

5 B = b;

6 C = c;

7 D = d;

8

9 return 0;

10 }

11 void main(void)

12 {

13 int a;

14 a = foo(1,2,3,4);

15 }

Disassembly:

1 00000000 <_start>:

2.text

3. global _start

4 _start:

5 ldr sp,=4096

6 0: e3a0da01 mov sp, #4096; 0x1000

7 bl main

8 4: eb000014 bl 5c