Addressing mode: Addressing is to find the address of the operand. Most instructions require operands when executing, so there is a problem of how to determine the address of the operand. The so-called addressing mode refers to the way through which the operand is obtained. Computers always provide multiple addressing modes according to the needs of instruction operations. Generally speaking, the more addressing modes, the stronger the computer's addressing capability, but the more complex the instruction system will be.
The 8051 instruction system has 7 addressing modes: register addressing, direct addressing, register indirect addressing, immediate addressing, base address register plus index register indirect addressing, relative addressing, and bit addressing, which are introduced below.
Register addressing
Register addressing: Register addressing means that the operand is in the register, so the operand is obtained by specifying the register. Instructions using the register addressing mode are all one-byte instructions, and the registers are represented by symbolic names in the instructions. For example: MOV A R1 The function of this instruction is to transfer the contents of working register R1 to accumulator A. Since the operand is in R1, R1 is specified in the instruction, and the operand is obtained.
The addressing range of the register addressing mode includes: working register group R0~R7, some special registers ACC, B, DPTR, etc.
Direct addressing
Direct addressing: Direct addressing means directly giving the real address of the unit where the operand is located in the instruction. The direct address of the operand given here is an 8-bit binary address. Hexadecimal numbers are generally used in programs. For example: the instruction MOV A, 30H transfers the data in the internal RAM unit 30H to the accumulator A. 30H in the instruction is the direct address of the operand.
The addressing range of direct addressing mode includes: the lower 128 units of internal data memory and special function registers.
In addition to being given in the form of direct addresses, special function registers can also be given in the form of register symbols in the instruction representation. For example, for accumulator A, its direct address OEOH can be used in the instruction, or its symbolic form ACC can be used.
Address immediately
Immediate addressing: The immediate addressing mode is that the actual operand is given directly in the instruction as part of the instruction. When the instruction is fetched, the operand can be obtained directly from the program memory.
Operands that appear in instructions are usually called immediate numbers. For instructions using immediate addressing mode, add the immediate addressing character "#" in front of the immediate number. For example, in the instruction MOV A, 30H in #30H is the immediate number, and the instruction function is to assign 30H to the accumulator A.
Except for one instruction in 8051 that requires a 16-bit immediate number, the rest are all 8-bit immediate numbers. This 16-bit immediate addressing instruction is: MOV DPTR. The function of the #data16 instruction is to assign a 16-bit immediate number. to the data pointer DPTR register.
register indirect addressing
Register indirect addressing: In the register indirect addressing mode, the address of the operand is stored in the register, that is, the operand is obtained indirectly through the register, so it is called register indirect addressing.
Indirect addressing of a register needs to be expressed in the form of a register symbol, and the indirect addressing symbol "@" is added in front of the register name. For example, the instruction MOV A, @R0 uses the register indirect addressing mode. The meaning of this instruction is to send the data in the internal data memory unit pointed by the address pointer R0 to the accumulator A.
Assuming that the content in R0 is 30H, the function of this instruction is to use the content 30H in the R0 register as the address to transfer the content in the internal RAM unit 30H to the accumulator A.
8051 stipulates that R0 and R1 DPTR are used as indirect addressing registers, which can address the lower 128B units of the on-chip data memory RAM and the lower 256 units of the off-chip data memory.
Using DPTR as an indirect address register, the entire 64KB address space of the off-chip data memory can be addressed. The stack pointer SP is used to indicate the address of the stack operation, therefore, the PUSH and POP instructions are also register indirect addressing.
Base register plus index register indirect addressing
Base address register plus index register indirect addressing: This addressing method is used to address the address space of the program memory. It uses DPTR or PC as the base address register, accumulator A as the index register, and the two The 16-digit number formed by the sum of the contents is used as the operand address, also known as indexed addressing.
For example, the instruction MOVC A, @A+DPTR is indexed addressing. Its function is to use the sum of the contents of DPTR and A as the address of the program memory, and then transfer the contents of the address unit in the program memory to the accumulator A.
If before executing the instruction, A=30H. DPTR=22F1H. The operand address formed according to this addressing mode is 22F1H+30H=2321H. The content in address unit 2321H of the program memory ROM is 68H. Therefore, the content of the instruction execution result A becomes 68H.
This addressing mode is specifically for program memory. Different base address registers have different addressing ranges.
When using PC as the base address register, the addressing range is 256B starting from the current PC value.
MOVC A, @A+PC addressing range is 64KB program memory space.
There are only three instructions using this addressing mode. MOVC A, @A+DPTR MOVC A, @A+PC JMP @A+DPTR The first two are program memory read instructions, also called table lookup instructions. The last one is an unconditional transfer instruction, also called a scattered transfer instruction.
relative addressing
Relative addressing: The relative addressing mode is designed to realize relative transfer of programs and is used by relative transfer instructions. In this addressing mode, the current value of the program counter PC is added to the offset rel given in the instruction, thereby forming the destination address of the program transfer.
It should be noted here that the current value of PC is the address of the next instruction of the relative transfer instruction. Therefore, the transfer destination address can be expressed as follows: destination address = transfer instruction address + transfer instruction byte number + rel. The relative address offset rel is an 8-bit signed two's complement code, ranging from +127 to -128. That is, in relative addressing, 127 bytes can be jumped forward and 128 bytes can be jumped backward.
For example, there is a two-byte transfer instruction JC 35H using relative addressing mode at the program memory address 2000H, and the forward bit CY=1 when executing this instruction. According to the function of the instruction, a relative transfer should occur. JC 35H is a two-byte instruction. Therefore, when calculating the destination address, the current value of PC is the address of the next instruction 2002H, and the offset is 35H. Therefore, the calculated destination address is 2037H. If it is assigned to PC, the program will move to address 2037H and continue running.
bit addressing
Bit addressing: 8051 has an independent bit processor, a Boolean processor, to process the addressed bits. Correspondingly, there is a type of bit operation instructions in the instruction system, which only allow bit addressing mode to directly address the 128 bits of the 16-byte unit of the internal data memory, as well as the directly addressable bits in the special function register. Each bit addressable bit has an independent 8-bit binary representation of the bit address.
In a Boolean processor, the carry bit CY is used as a bit accumulator. For example, the instruction ANL C, 31H is a bit-addressed instruction, and its function is to perform a logical AND operation between the value of the Boolean accumulator C and the value in the bit address 31H.
The addressing range of the bit addressing mode is a total of 128 binary bits in the 16-byte unit of the byte address 20H~2FH in the internal ROM, and the bit address is 00~7FH. In 8051, the bit address can be represented in the following forms:
Directly use the bit address to express, for example, the bit address of the carry bit CY is 0D7H.
The representation of the byte unit address plus bits is used, such as 20H.5, which represents bit 5 of the byte unit address 20H. This representation can avoid table lookup or calculation, which is more convenient. For bit-addressable special function registers, you can directly use the method of adding bits to the register name. For example, PSW.7 represents the carry bit CY, and ACC.5 represents the fifth bit of the accumulator ACC.
Use bit names: In bit-addressable special function registers, some bits have signed names. For example, bit 5 in PSW is the F0 flag. This bit can be represented by direct F0, and the carry bit can be represented by CY, etc.
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