Audio peak collection terminal design based on C8051F020 microcontroller and RTL8019AS

Broadcast signals go through program production and broadcasting, signal transmission, emission and other links, and are finally listened to at the audience's end. The system working status of each link will have an impact on the final broadcast quality. In order to comprehensively monitor the signal quality of multiple links in the broadcasting process of broadcast signals and simultaneously monitor the audio peaks of high-cycle signals and low-cycle signals (audio baseband signals), the audio peak monitoring terminal is required to monitor the broadcast signal broadcasting end and transmitter. The terminal and the demodulated audio signal are monitored. Generally, the production and broadcast end, transmitter end, and monitoring and control end of a radio station are not in the same place. Take Shanghai as an example: production and broadcasting are at the Hongqiao Road Broadcasting Building; the transmitter is at the Oriental Pearl TV Tower; and the monitoring center is at the Bund, Beijing Road. The best monitoring method is to collect data from each location separately, and then transmit the collected data to the monitoring center for centralized analysis and processing through the internal LAN.

1Block diagram

C8051F020 is a fully integrated mixed-signal ISP Flash microcontroller of the 8051 series produced by Silicon Laboratories in the United States.

The audio peak acquisition terminal based on C805lF020 inputs balanced audio signals. After subtraction circuit, gain adjustment circuit, negative waveform inversion circuit, detector circuit, emitter follower circuit and voltage divider circuit, the 8-bit and 12-bit A signals inside the microcontroller are finally used. /D converter, which can collect 16 channels of audio peak data at one time. The C8051F020 microcontroller packages the peak data and GPS (Global Positioning System) time into application layer data, and then through the UDP layer, IP layer and Ethernet layer protocols, and finally packages it into an Ethernet package, and sends the data to the LAN through the Ethernet interface chip RTL8019AS superior. The schematic block diagram is shown in Figure 1.

2 Peak acquisition circuit analysis

The input part of the audio peak acquisition circuit is a subtraction circuit, as shown in Figure 2. The input signal can be a balanced audio signal:

Taking R2, R3, R4, and R5 to have equal resistance values, we can get:

V1=V+—V-

The second-level operational amplifier circuit is an inverting proportional amplifier, which can adjust the gain of the signal:

The three-stage operational amplifier circuit is a negative waveform inverting circuit. When the signal is in positive phase, Dl is turned on, and the circuit behaves as a voltage follower circuit: V3=V2+ where V2+ is the positive phase voltage part of the V2 signal.

When the signal is in negative phase, D2 is turned on, and the circuit behaves like an inverting proportional amplifier circuit. Assuming R9=R10=10 kΩ:

Among them, V2 is the negative phase voltage part of the V2 signal.

So after the third-level op amp: V3=V2+-V2-

Diode D3 uses a detection diode and forms a detection circuit with capacitor C5; resistors R12, R13 and R14 are voltage zeroing networks; the voltage dividing circuit composed of R15 and R16 adjusts the signal range into the voltage range of the A/D conversion of C8051F020. The analog-to-digital conversion subroutine is as follows:

void ADC0_and_ADCl(unsigned char xdata*adc0, unsigned

char xdata*adcl){

unsigned char i;

ADOINT=0:

ADClCN=ADClCN & 0xDF:

for(i=0;i<8;i++){

AMXOSL=i; //Select the input port of ADC0/ADCl

AMXlSL=i：

ADOBUSY=1:

ADClCN=A13 (21CN 1 0x10:

while ((ADClCN & 0x20) == O); // Wait for the end of ADCl data conversion

ADClCN=ADClCN&0xDF:

adcl［i］=ADCl;

while(ADOlNT==O);//Waiting for the end of ADC0 data conversion

ADOINT=0;

adc0［i］=ADCOH;

}

}

3 Key points of network transmission technology

The network transmission part is mainly responsible for sending the sampled audio peak information and collection time to the target PC through Ethernet for data processing. The application layer protocols are listed in Table 1.

The application layer protocol calls UDP. C packages the application layer data into UDP packets and binds the target address for sending. Using UDP transmission method is mainly based on the following considerations:

①TCP requires the target end to connect in a complicated way, which will consume a lot of time resources of the microcontroller. Past experience has shown that there will be unreliable or disconnected connections.

② There is a large amount of real-time, long-term audio peak data sent, and the UDP method is more suitable for this application.

Generally, the specified target address is an IP address. To obtain the Ethernet address of the target machine, the support of ARP protocol (Address Resolution Protocol) is required. The following is the processing procedure after receiving the ARP packet:

void arp_rcve(UCHAR xdata*inbuf){

:

//Whether a valid ARP packet is received

//Check whether there is a received IP address, if so, update the entry and reset

//Start time

if (arp one》dest_ipaddr!=my_ipaddr) return; // target address

//Do not point to yourself, return

//Find a blank IP address to store the entry. No blank IP address found

//Save entries, find the oldest entry and replace it. Oldest article not found

//Module, no replacement

if (arp one》message_type==ARP_RESPONSE){//received

//ARP response packet

//If this machine is waiting for ARP response, the responding IP will have to wait.

//IP address

if（（waiting_for_arp）&&（wait.ipaddr==arp一》

Source_ipaddr)){

waiting_for_arp=FALSE; //Clear the waiting flag

ip_send(waic buf.wait.ipaddr, wait.pmto_id, wait.len);

}

}

else if (arp one》message_type==ARP_REQUEST){

arp_send (arp one》source_hwaddr, arp one》source_ipad—

dr, ARP_RESPONSE);

}//If an ARP request packet is received, send an ARP request response

)

The ARP protocol periodically accesses the ARP storage buffer. If the lifetime of an entry in the cache reaches the end, the ARP protocol will delete the entry. In order to ensure that the hardware address of the data sending destination address is not removed, the program stipulates that the ARP entry of the destination address in the ARP buffer will not be removed over time.

void age arp_cache(void){

UCHARi;

for(i=0;i《SPAN》

//The ARP entry for the destination address will not be removed over time

if (arp_cache[i].ipaddr!=udp_dest_ipaddr_rw){

if ((arp_cache[i].ipaddr!=0)&&(arp_cache[i].

timer)){

arp cache［i］． timer one by one;

//The time of life has arrived. The IP address entry of the entry is cleared.

if (arp_cache [i]. timer==O) arp_

cache［i］． ipaddr=01

}

}

}

}

The hardware part of network transmission is composed of C8051F020 and RTL8019AS, forming a 10M Ethernet interface. The Ethernet and IP addresses can be saved in Flash through serial port configuration. After C8051F010 is powered on, the Ethernet address will be transferred to RTL8019AS. After RTL8019AS is initialized, it completes the reception and transmission of Ethernet layer data packets.

Conclusion

The audio peak collection terminal based on the C8051F020 microcontroller has the characteristics of high stability and network transmission, and meets the long-term, uninterrupted and long-distance requirements of the broadcast monitoring network. It has been successfully applied to the broadcast monitoring network.