Prerequisite:
norflash is initialized normally and can be executed normally from nor.
The CPU always reads instructions from address 0 to execute the program. When the CPU is set to nor to start, address 0 corresponds to nor. When the cpu starts from nand, address 0 corresponds to sram.
1. Read norFlash
We set the board to nor boot, then address 0 corresponds to nor, we first program uboot into nor. Let’s first look at the NorFlash manual and find the command list for operating flash:
Here are some simple examples:
1) Reset:
Just write F0 to any address.
2) Read ID:
Many Nor Flash can be configured with a bit width of 16bit (Word) and a bit width of 8bit (Byte). Our norflash has a data bit width of 16bit. Let's try it according to the command list in the nor manual:
Write AAH to address 555H (unlock)
Write 55H to address 2AAH (unlock)
Write 90H to address 555H (command)
Read the 0 address to get the manufacturer ID (C2H)
Read 1 address to get the device ID (22DAH or 225BH)
Exit the read ID state (just write F0H to any address)
The above address is for norflash, so how does our CPU send the address?
From the above schematic diagram, we know that the addresses of the CPU and nor are misaligned, that is:
for example:
cpu address | nor address |
---|---|
A15~A1 | A14~A0 |
Then you can see that the address of the CPU is actually equivalent to the nor address shifted one position to the left. For example, if you want to write AAH to the 555H address on the nor, then the address to be sent by the CPU should be 0x555<<1, which is the nor address. 2 times.
The following compares the operations on Nor Flash, CPU operations, and U-BOOT operations, as shown in the following table:
Nor Flash operation | cpu operation | Operations on U-BOOT |
---|---|---|
Write AAH to address 555H (unlock) | Write AAH to address AAAH (unlock) | mw.w aaa aa |
Write 55H to address 2AAH (unlock) | Write 55H to address 554H (unlock) | mw.w 554 55 |
Write 90H to address 555H (command) | Write 90H to address AAAH (command) | mw.w aaa 90 |
Read the 0 address to get the manufacturer ID (C2H) | Read the 0 address to get the manufacturer ID (C2H) | md.w 0 1 (1: means read once) |
Read 1 address to get the device ID (22DAH or 225BH) | Read 2 addresses to get the device ID (22DAH or 225BH) | md.w 2 1 |
Exit the read ID state (write F0H to any address) | Exit the read ID state (write F0H to any address) | mw.w 0 f0 |
We read that the manufacturer ID is c2 and the device ID is 2249, which is consistent with our nor manual. We issue the f0 command to reset. At this time, the data read is no longer the manufacturer ID and device ID, but the actual data 17 00 00 ea in our norflash.
3) Read data:
As we said before, nor can be read like ram, so as long as the memory controller is initialized, it can be read directly.
We then use UE to open the uboot.bin we burned in in hexadecimal, and found that the contents are the same, which means that the data we read from norflash is correct.
4) Read attributes:
Usually there are two ways to identify a Nor Flash in the kernel:
One is jedec detection, which is to define an array in advance in the kernel. The array contains some parameters of each chip from different manufacturers. During detection, compare the ID of the flash with the ID in the array one by one. If the same is found, Use the parameters of this array. The advantage of jedec detection is that it is simple. You can access the flash attributes through the array number of the flash. The disadvantage is that if the kernel needs to support many types of flash, the array will be very large.
One is CFI (common flash interface) detection, which is to directly send various commands to read the chip information, such as ID, capacity, etc. The chip itself contains information such as the voltage and capacity.
Our norflash belongs to cfi detection. The following is to operate on Nor Flash, operate on 2440, and perform cfi detection (read chip information) on U-BOOT.
The picture below shows some flash attribute lookup tables after entering cfi mode. You can query some attributes of norflash (capacity, voltage, block information, etc.) according to the table commands.
1. According to the command table, write 98H to address 55H to enter cfi mode.
2. Read `qry`
3. Get attributes
Operating cfi on Nor Flash | Operating cfi on 2440 | Operating cfi on U-BOOT |
---|---|---|
Write 98H to address 55H (enter cfi mode) | Write 98H to the AAH address | mw.w aa 98 |
Reading address 10H gets 0051 ('q') | Read address 20H and get 0051 | md.w 20 1 |
Read address 11H and get 0052('r') | Read address 22H and get 0052 | md.w 22 1 |
Read address 12H and get 0059('y') | Read address 24H and get 0059 | md.w 24 1 |
Read address 27H to get the capacity | Read address 4EH to get the capacity | md.w 4e 1 |
Read address 1BH to get VCCmin | Read address 36H to get VCCmin | md.w 36 1 |
From the test results, we see that the capacity is 2^21=2M, and the minimum supply voltage of Vcc is 2.7v.
2.Write norFlash
We have said before that norflash can be read directly like memory using the md command, but cannot be written directly like memory. If you don’t believe it, let’s try:
①We read data at the address 0x10000 of Nor Flash;
Since our uboot is only 162k, after burning to norflash, the 0x100000 address on norflash has not been written with data. The capacity of norflash is 2M (0~0x200000), so the address data of 0x10000 read from NorFlash is 0xffff.. .
② Write data to 0x1234 at address 10000 of Nor flash, and then read data at this address;
③ From the picture above, we have verified that norflash can be read directly like memory, but cannot be written directly like memory. So how can we write norflash?
We follow the command list in the norflash manual:
Nor Flash write operation | 2440 write operation | Write operation on U-BOOT |
---|---|---|
Write AAH to address 555H (unlock) | Write AAH to the address AAAH (unlock) | mw.w aaa aa |
Write 55H to address 2AAH (unlock) | Write 55H to address 554H (unlock) | mw.w 554 55 |
Write A0H to address 555H | Write A0H to address AAAH | mw.w aaa a0 |
Write PD to address PA | Write 1234h to address 0x100000 | mw.w 100000 1234 |
We read the data and found that 0x1234 has been written to address 0x100000.
④We write 0x5678 to the address 0x100000 again;
At this time we found that the data at the address 0x100000 was not 0x5678, but 0x1230. Why?
Since the original data is already 0x1234 and not all 0xffff, we mentioned in the norflash principle before that we can only change 1 in the flash storage medium into 0, but not 0 into 1. Therefore, it will be problematic to continue writing 0x5678 without erasing it on the basis of 0x1234.
0001 0010 0011 0100(0x1234)
0101 0110 0111 1000 (0x5678)
----------------------------
0001 0010 0011 0000(0x1230)
Therefore, the flash must be erased before writing.
⑤Erase first (refer to Nor Flash chip manual)
Nor Flash wipe operation | u-boot wipe operation |
---|---|
Write AAH to address 555H | mw.w aaa aa |
Write 55H to address 2AAH | mw.w 554 55 |
Write 80H to address 555H | mw.w aaa 80 |
Write AAH to address 555H | mw.w aaa aa |
Write 55H to address 2AAH | mw.w 554 55 |
Write 30H to address PA | mw.w 100000 30 |
After erasing and reading again, it is found that the data has become 0xffff, and writing operations can be performed later.
⑥Write again
The data now becomes our 0x5678.
Note: When writing norflash, be careful not to write the 0 address or the address where uboot is located, otherwise the uboot program on norflash will be destroyed after writing. For example, this test writes the address 0x100000, which is outside uboot.
Question expansion
1. Based on the jz2440 development board, using uboot to send md.w 0, md.w 2, md.w 4 and other even address commands can read norflash, but using md.w 1, md.w 3, md.w 5 cannot There will be a crash, why?
Since our norflash is 16bit data wide, 2byte alignment is required during access. If you don't want to access in 2byte units, then use single-byte read commands such as md.b 1 and md.b 3 in uboot.
2. When operating norflash in uboot to erase and write, can it be unlocked once and erased multiple times?
No, every time you erase or write, you need to perform an unlocking action.
3. In uboot, erasure is based on sectors (sectors). So when erasing, the address sent is not aligned with blocks. What will be the result?
It can also be erased successfully, and which block it is in will be determined based on the address range.
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