I. Introduction
There is no ROM inside the S3C2440 chip to store user code, so the user code needs to be saved in an external memory. If it is NorFlash, you can run the program directly in NorFlash, but NorFlash is more expensive. NandFlash is generally used as the storage medium, and SDRAM is used as the storage medium. The running space of the code. There is a 256MB NandFlash chip on the JZ2440 development board. The learning process is recorded. The code is the routine that comes with the development board.
2. Experimental goals
Run the program in SRAM to turn off the watchdog, initialize SDRAM, and initialize the NandFlash controller. Then copy the main.c part of the code in NandFlash block 1 to SDRAM and run it. You can see that the three LEDs on the development board display the running light effect.
3. Resource Analysis
NandFlash model K9F2G08U0C, SLC Samsung particles, the basic parameters are as follows:
Page size is 2K+64Byte, which means the first 2KB of a Page is used to store data, and the remaining 64 bytes are used to store ECC (Error Correction Code) or customized redundant data. Due to its physical characteristics, NandFlash generally has bad blocks, and the data stored in NandFlash is not as stable as SRAM, and bit flips may occur, so some check codes (ECC) need to be added to correct these errors. In fact, because this NandFlash is SLC, it is much more stable than MLC or TLC NandFlash, and bit flips rarely occur under normal environmental conditions. Although a Page actually has a data volume of 2K+64Byte, generally only 2K is used. Of course, if you have to use the subsequent 64Byte data, it is also possible. In that case, ECC will not be used. It is only recommended to use 2K. It's up to you how you want to use it.
Block size is 128K+4K, which means a Block has 64 Pages. The minimum unit for writing is Page, and the minimum unit for erasing is Block. There are 2048 Blocks in the whole disk.
The NandFlash interface is simpler than that of SDRAM, and the address bus and data bus are shared.
In large page mode, there are 5 cycles when sending an address, and a 5-byte address is sent. as follows:
The first two bytes are the column address, *L means forced to 0, so the column address actually uses 12 bits for addressing. It can address the range from 0 to 4096, which is used to address the byte offset within the Page. , just enough to address 2KB + 64Byte of data.
The last three bytes are the row address, *L means forced to 0, so the row address actually uses 17 bits for addressing, which can address the range of 0 to 128K, and is used to address the Page serial number, 64 Pages X 2048 Blocks = 128K Pages, so just 17 bits are enough.
Read and write data to several NandFlash special registers of S3C2440, and the NandFlash controller will operate the IO pins to control the NandFlash in the form of commands or data. as follows:
4. Program code
The program is divided into 6 files, as follows:
head.S: Start the file and complete related initialization.
init.c: Initialization related C function code.
nand.c: NandFlash initialization and related operation codes.
main.c: The code for running the water lamp needs to be copied to SDRAM for running.
nand.lds: link script, divide program segments.
Makefile: compile the code.
The contents of these code files are as follows:
head.S
@****************************************************** *****************************
@File:head.s
@ Function: Set SDRAM, copy the program to SDRAM, then jump to SDRAM to continue execution
@****************************************************** *****************************
.text
.global_start
_start:
@Function disable_watch_dog, memsetup, init_nand, nand_read_ll are defined in init.c
ldr sp, =4096 @set stack
bl disable_watch_dog @offWATCH DOG
bl memsetup @initialize SDRAM
bl nand_init @Initialize NAND Flash
@Copy the 1024-byte code starting at address 4096 in NAND Flash (obtained by compiling main.c) to SDRAM
The @nand_read_ll function requires 3 parameters:
ldr r0, =0x30000000 @1. Target address =0x30000000, which is the starting address of SDRAM
mov r1, #4096 @2. Source address = 4096. When connecting, the code in main.c is stored at the beginning of NAND Flash address 4096
mov r2, #2048 @3. Copy length = 2048 (bytes), which is enough for main.c of this experiment
bl nand_read @call C function nand_read
ldr sp, =0x34000000 @set stack
ldr lr, =halt_loop @set return address
ldr pc, =main @b instructions and bl instructions can only jump within a range of 32M, so here we use the method of assigning a value to pc to jump.
halt_loop:
b halt_loop
init.c
/* WOTCH DOG register */
#define WTCON (*(volatile unsigned long *)0x53000000)
/* SDRAM regisers */
#define MEM_CTL_BASE 0x48000000
void disable_watch_dog();
void memsetup();
/*After power on, WATCH DOG is on by default, you need to turn it off*/
void disable_watch_dog()
{
WTCON = 0;
}
/* 设置控制SDRAM的13个寄存器 */
void memsetup()
{
int i = 0;
unsigned long *p = (unsigned long *)MEM_CTL_BASE;
/* SDRAM 13个寄存器的值 */
unsigned long const mem_cfg_val[]={ 0x22011110, //BWSCON
0x00000700, //BANKCON0
0x00000700, //BANKCON1
0x00000700, //BANKCON2
0x00000700, //BANKCON3
0x00000700, //BANKCON4
0x00000700, //BANKCON5
0x00018005, //BANKCON6
0x00018005, //BANKCON7
0x008C07A3, //REFRESH
0x000000B1, //BANKSIZE
0x00000030, //MRSRB6
0x00000030, //MRSRB7
};
for(; i < 13; i++)
p[i] = mem_cfg_val[i];
}
其实SDRAM的初始化就配置BANK6相关的几个寄存器就可以了,例程这里配多了。
nand.c
#define LARGER_NAND_PAGE
#define GSTATUS1 (*(volatile unsigned int *)0x560000B0)
#define BUSY 1
#define NAND_SECTOR_SIZE 512
#define NAND_BLOCK_MASK (NAND_SECTOR_SIZE - 1)
#define NAND_SECTOR_SIZE_LP 2048
#define NAND_BLOCK_MASK_LP (NAND_SECTOR_SIZE_LP - 1)
typedef unsigned int S3C24X0_REG32;
/* NAND FLASH (see S3C2410 manual chapter 6) */
typedef struct {
S3C24X0_REG32 NFCONF;
S3C24X0_REG32 NFCMD;
S3C24X0_REG32 NFADDR;
S3C24X0_REG32 NFDATA;
S3C24X0_REG32 NFSTAT;
S3C24X0_REG32 NFECC;
} S3C2410_NAND;
/* NAND FLASH (see S3C2440 manual chapter 6, www.100ask.net) */
typedef struct {
S3C24X0_REG32 NFCONF;
S3C24X0_REG32 NFCONT;
S3C24X0_REG32 NFCMD;
S3C24X0_REG32 NFADDR;
S3C24X0_REG32 NFDATA;
S3C24X0_REG32 NFMECCD0;
S3C24X0_REG32 NFMECCD1;
S3C24X0_REG32 NFSECCD;
S3C24X0_REG32 NFSTAT;
S3C24X0_REG32 NFESTAT0;
S3C24X0_REG32 NFESTAT1;
S3C24X0_REG32 NFMECC0;
S3C24X0_REG32 NFMECC1;
S3C24X0_REG32 NFSECC;
S3C24X0_REG32 NFSBLK;
S3C24X0_REG32 NFEBLK;
} S3C2440_NAND;
typedef struct {
void (*nand_reset)(void);
void (*wait_idle)(void);
void (*nand_select_chip)(void);
void (*nand_deselect_chip)(void);
void (*write_cmd)(int cmd);
void (*write_addr)(unsigned int addr);
unsigned char (*read_data)(void);
}t_nand_chip;
static S3C2410_NAND * s3c2410nand = (S3C2410_NAND *)0x4e000000;
static S3C2440_NAND * s3c2440nand = (S3C2440_NAND *)0x4e000000;
static t_nand_chip nand_chip;
/* 供外部调用的函数 */
void nand_init(void);
void nand_read(unsigned char *buf, unsigned long start_addr, int size);
/* NAND Flash操作的总入口, 它们将调用S3C2410或S3C2440的相应函数 */
static void nand_reset(void);
static void wait_idle(void);
static void nand_select_chip(void);
static void nand_deselect_chip(void);
static void write_cmd(int cmd);
static void write_addr(unsigned int addr);
static unsigned char read_data(void);
/* S3C2410的NAND Flash处理函数 */
static void s3c2410_nand_reset(void);
static void s3c2410_wait_idle(void);
static void s3c2410_nand_select_chip(void);
static void s3c2410_nand_deselect_chip(void);
static void s3c2410_write_cmd(int cmd);
static void s3c2410_write_addr(unsigned int addr);
static unsigned char s3c2410_read_data();
/* S3C2440的NAND Flash处理函数 */
static void s3c2440_nand_reset(void);
static void s3c2440_wait_idle(void);
static void s3c2440_nand_select_chip(void);
static void s3c2440_nand_deselect_chip(void);
static void s3c2440_write_cmd(int cmd);
static void s3c2440_write_addr(unsigned int addr);
static unsigned char s3c2440_read_data(void);
/* S3C2410的NAND Flash操作函数 */
/* 复位 */
static void s3c2410_nand_reset(void)
{
s3c2410_nand_select_chip();
s3c2410_write_cmd(0xff); // 复位命令
s3c2410_wait_idle();
s3c2410_nand_deselect_chip();
}
/* 等待NAND Flash就绪 */
static void s3c2410_wait_idle(void)
{
int i;
volatile unsigned char *p = (volatile unsigned char *)&s3c2410nand->NFSTAT;
while(!(*p & BUSY))
for(i=0; i<10; i++);
}
/* 发出片选信号 */
static void s3c2410_nand_select_chip(void)
{
int i;
s3c2410nand->NFCONF &= ~(1<<11);
for(i=0; i<10; i++);
}
/* 取消片选信号 */
static void s3c2410_nand_deselect_chip(void)
{
s3c2410nand->NFCONF |= (1<<11);
}
/* 发出命令 */
static void s3c2410_write_cmd(int cmd)
{
volatile unsigned char *p = (volatile unsigned char *)&s3c2410nand->NFCMD;
*p = cmd;
}
/* 发出地址 */
static void s3c2410_write_addr(unsigned int addr)
{
int i;
volatile unsigned char *p = (volatile unsigned char *)&s3c2410nand->NFADDR;
*p = addr & 0xff;
for(i=0; i<10; i++);
*p = (addr >> 9) & 0xff;
for(i=0; i<10; i++);
*p = (addr >> 17) & 0xff;
for(i=0; i<10; i++);
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