#microcontroller# ------ stc89c52 pin description

STC89C52 function brief description:

STC89C52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K in-system programmable Flash memory. Manufactured using high-density non-volatile memory technology, it is fully instruction- and pin-compatible with industrial 80C51 products. On-chip Flash allows the program memory to be programmable in the system and is also suitable for conventional programmers. On a single chip, it has a smart 8-bit CPU and online system programmable Flash, making the STC89C52 a highly flexible and ultra-effective solution for many embedded control application systems. STC89C52 has the following standard features: 8k bytes of Flash, 256 bytes of RAM, 32-bit I/O lines, watchdog timer, 2 data pointers, three 16-bit timers/counters, and a 6-vector level 2 interrupt structure, full-duplex serial port, on-chip crystal oscillator and clock circuit. In addition, STC89C52 can reduce to 0Hz static logic operation and supports 2 software-selectable power-saving modes. In idle mode, the CPU stops working and allows RAM, timers/counters, serial ports, and interrupts to continue working. In the power-down protection mode, the RAM contents are saved, the oscillator is frozen, and all work of the microcontroller stops until the next interrupt or hardware reset. 8-bit microcontroller with 8K bytes of in-system programmable Flash.

STC89C52 pin description:

VCC (40 pin): power supply voltage

VSS (20 pin): ground

Port P0: Port P0 is an 8-bit open-drain bidirectional I/O port. As an output port, each bit can drive 8 TTL logic levels. When writing "1" to the P0 port, the pin functions as a high-impedance input. When accessing external program and data memory, Port 0 is also used as the lower 8-bit address/data multiplexing. In this mode, P0 has an internal pull-up resistor. During flash programming, the P0 port is also used to receive the instruction byte; during program verification, the instruction byte is output. During program verification, an external pull-up resistor is required.

P1 port: P1 port is an 8-bit bidirectional I/O port with internal pull-up resistor. The p1 output buffer can drive 4 TTL logic levels. When "1" is written to the P1 port, the internal pull-up resistor pulls the port high, and it can be used as an input port. When used as an input, the pin that is externally pulled low will output current (IIL) due to the internal resistance.

In addition, P1.0 and P1.2 are used as the external count input (P1.0/T2) of timer/counter 2 and the trigger input (P1.1/T2EX) of timer/counter 2 respectively, as shown in the following table. During flash programming and verification, the P1 port receives the lower 8-bit address bytes.

Table 1 P1.0 and P1.1 pin alternate functions

Second function of pin number

P1.0 T2 (external count input of timer/counter T2), clock output

P1.1 T2EX (capture/reload trigger signal and direction control of timer/counter T2)

P1.5 MOSI (for online system programming)

P1.6 MISO (for online system programming)

P1.7 SCK (for online system programming)

P2 port: P2 port is an 8-bit bidirectional I/O port with internal pull-up resistor. The P2 output buffer can drive 4 TTL logic levels. When "1" is written to the P2 port, the internal pull-up resistor pulls the port high, and it can be used as an input port. When used as an input, the pin that is externally pulled low will output current (IIL) due to the internal resistance.

When accessing external program memory or reading external data memory with a 16-bit address (such as executing MOVX @DPTR), port P2 sends the upper eight bits of the address. In this application, port P2 uses a strong internal pull-up to send 1s. When using an 8-bit address (such as MOVX @RI) to access external data memory, the P2 port outputs the contents of the P2 latch. During flash programming and verification, port P2 also receives the upper 8-bit address bytes and some control signals.

P3 port: P3 port is an 8-bit bidirectional I/O port with internal pull-up resistor. The P3 output buffer can drive 4 TTL logic levels. When "1" is written to the P3 port, the internal pull-up resistor pulls the port high, and it can be used as an input port. When used as an input, the pin that is externally pulled low will output current (IIL) due to the internal resistance. Port P3 is also used as a special function (second function) of STC89C52, as shown in the table below. During flash programming and verification, the P3 port also receives some control signals.

In addition to being a general I/O port, P3 port also has some other multiplexing functions:

Table 2 P3 port pin alternate function

RST——Reset input. When the oscillator is working, a high level on the RST pin for more than two machine cycles will reset the microcontroller.

ALE/PROG - When accessing external program memory or data memory, the ALE (Address Latch Enable) output pulse is used to latch the lower 8-bit byte of the address. Under normal circumstances, ALE still outputs a fixed pulse signal at 1/6 of the clock oscillation frequency, so it can output a clock externally or be used for timing purposes. Note: An ALE pulse will be skipped whenever external data memory is accessed.

During programming of FLASH memory, this pin is also used to input the programming pulse (PROG).

If necessary, ALE operation can be disabled by setting the D0 bit in location 8EH in the Special Function Register (SFR) area. After this bit is set, only one MOVX and MOVC instruction can activate ALE. In addition, this pin will be pulled high weakly. When the microcontroller executes an external program, the ALE disable bit should be set to be invalid.

PSEN - Program storage enable (PSEN) output is the read strobe signal of the external program memory. When the STC89C52 fetches instructions (or data) from the external program memory, PSEN is valid twice per machine cycle, that is, two pulses are output. During this period, when accessing external data memory, the PSEN signal will be skipped twice.

EA/VPP - External access is allowed. To enable the CPU to only access the external program memory (address 0000H-FFFFH), the EA terminal must remain low (grounded). It should be noted that if the encryption bit LB1 is programmed, the EA terminal status will be latched internally during reset. If the EA terminal is high level (connected to the Vcc terminal), the CPU executes the instructions in the internal program memory. When programming FLASH memory, add +12V programming permission power Vpp to this pin. Of course, this must be that the device uses 12V programming voltage Vpp.