U-boot-2014.04 ported to MINI2440 (11) Analysis of the second boot phase

Let's review what u-boot does in the first stage of startup:

First: Set the CPU to SVC mode

Second: Turn off the watchdog

Third: Turn off interrupts and sub-interrupts

Step 4: Set the clock

Fifth: MMU is turned off, cache and TLB are cleared, address alignment check is enabled, etc.

Sixth: Initialize SDRAM

       In my previous analysis, at the end of the first stage, through bl _main, it jumped to arch/arm/lib/crt0.S. From here is the entry to the second stage. Let's start the analysis from here.

       File: crt0.S

       First, let's look at the description of _main in the file. On line 18, there is a _main execution sequence is: There are five steps below, which is actually an introduction to the execution process of _main. I will translate it:

       1. Set up the initial environment and prepare to call board_init_f(). Provide a stack or address to store the global data structure gd.

       2. Call board_init_f(). This function is to prepare the hardware environment for execution. Since RAM may not be available yet, board_init_f() must use the current GD to store any data that must be passed in a later stage. This data includes the relocation destination, the future stack, and the future GD location.

       3. Set up the intermediate environment. Use board_init_f() to allocate space in RAM for gd and stack, but bss and non-constant data are still unavailable.

       4. Call the redirection code. This function relocates U-Boot from the current location to the redirected address calculated by board_init_f.

       5. Establish the final environment and call board_init_r(). This includes clearing BSS in RAM, initializing variables and stack, and gd retaining the value set by board_init_f().

       6. Jump to board_init_r() execution.

Function: _main

       ENTRY(_main)

/*

 * Set up initial C runtime environment and call board_init_f(0).

 */

#ifdefined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)

       ldr sp,=(CONFIG_SPL_STACK)

#else

       ldr sp,=(CONFIG_SYS_INIT_SP_ADDR)

#endif

       bic sp,sp, #7 /* 8-byte alignment for ABI compliance*/

       sub sp,sp, #GD_SIZE /* allocate one GD aboveSP */

       bic sp,sp, #7 /* 8-byte alignment for ABI compliance */

       mov r9,sp /* GD is above SP */

       Initialize the stack pointer and prepare the calling environment for board_init_f. Finally, the address in the r9 register is the first address of the gd structure.

       #if 1

       __TEXT_BASE:

       .word CONFIG_SYS_TEXT_BASE

       mov r0, #0

       ldr r1, __TEXT_BASE

       ldr r2, __TEXT_BASE

       ldr r3, =__bss_end

       sub r2, r3, r2

       bl copy_code_to_sdram

       bl clear_bss

       ldr pc, =call_board_init_f

       .word means placing the value of CONFIG_SYS_TEXT_BASE at the address of __TEXT_BASE. Another option is .globl, which tells the compiler that the symbol immediately following it will be used by the compiler.

       Clear r0, set r1 and r2 to __TEXT_BASE address, and set r3 to the end address of bss segment. Set the difference between the end address and TEXT_BASE to r2, then jump to copy_code_to_sdram and switch to it:

       void copy_code_to_sdram(unsigned char *src, unsigned char *dest, unsigned int len)

{

int i = 0;

/* If it is NOR boot */

       if (isBootFromNorFlash())

       {

       while (i < len)

              {

                     dest[i] = src[i];

              i++;

              }

       }

else

       {

       nand_init_b();

       nand_read_b((unsigned int)src, dest,len);

       }

}

First determine whether to boot from nand or nor, then copy the code to sdram. Next, select bss segment, then ldr pc, =call_board_init_f, jump to

call_board_init_f:

       mov r0, #0

       bl board_init_f

Function: board_init_f

       gd->mon_len = (ulong)&__bss_end - (ulong)_start;

Specifies the size of the code, which is the end address of the bss segment minus the _start address.

       for (init_fnc_ptr = init_sequence;*init_fnc_ptr; ++init_fnc_ptr) {

              if ((*init_fnc_ptr)() != 0) {

                     hang ();

              }

       }

Traversing the functions in init_sequence, the init_sequence function is as follows:

init_fnc_t *init_sequence[] = {

       arch_cpu_init, /* basic arch cpu dependent setup */

       mark_bootstage,

#ifdefCONFIG_OF_CONTROL

       fdtdec_check_fdt,

#endif

#ifdefined(CONFIG_BOARD_EARLY_INIT_F)

       board_early_init_f,

#endif

       timer_init, /* initialize timer */

#ifdef CONFIG_BOARD_POSTCLK_INIT

       board_postclk_init,

#endif

#ifdefCONFIG_FSL_ESDHC

       get_clocks,

#endif

       env_init, /*initialize environment */

       init_baudrate, /* initialise baudrate settings */

       serial_init, /* serial communications setup */

       console_init_f, /* stage 1 init of console */

       display_banner, /* say that we are here */

       print_cpuinfo, /* display cpu info (and speed) */

#ifdefined(CONFIG_DISPLAY_BOARDINFO)

       checkboard, /* display board info */

#endif

#ifdefined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)

       init_func_i2c,

#endif

       dram_init, /* configure available RAM banks */

       NULL,

};

There are many important initialization functions here, such as init_baudrate, serial_init, console_init_f, etc. I won’t go through them one by one. It is enough to just know what each function name does.

addr = CONFIG_SYS_SDRAM_BASE + get_effective_memsize();

Here the address is equal to BASE + effective address, which is the available portion of the entire sdram. In the following:

#if !(defined(CONFIG_SYS_ICACHE_OFF) &&defined(CONFIG_SYS_DCACHE_OFF))

       /* reserveTLB table */

       gd->arch.tlb_size= PGTABLE_SIZE;

       addr -=gd->arch.tlb_size;

       /* rounddown to next 64 kB limit */

       addr&= ~(0x10000 - 1);

       gd->arch.tlb_addr= addr;

       debug("TLBtable from %08lx to %08lxn", addr, addr + gd->arch.tlb_size);

#endif

       /* rounddown to next 4 kB limit */

       addr&= ~(4096 - 1);

       debug("Topof RAM usable for U-Boot at: %08lxn", addr);

This means that if icache and dcache are not defined to be closed, PGTABLE_SIZE will be given to gd, and addr will be subtracted from the size of gd. Finally, the value of addr is actually the address of tlb, and it must be 4Kb aligned.

addr=CONFIG_SYS_TEXT_BASE;

Here CONFIG_SYS_TEXT_BASE; code u-boot code in memory starting address.

addr_sp = addr - TOTAL_MALLOC_LEN;

       debug("Reserving %dk for malloc()at: %08lxn",

                     TOTAL_MALLOC_LEN >> 10, addr_sp);

       /*

        *(permanently) allocate a Board Info struct

        *and a permanent copy of the "global" data

        */

       addr_sp -= sizeof (bd_t);

       bd = (bd_t *) addr_sp;

       gd->bd = bd;

       debug("Reserving %zu Bytes for BoardInfo at: %08lxn",

                     sizeof (bd_t), addr_sp);

#ifdef CONFIG_MACH_TYPE

       gd->bd->bi_arch_number= CONFIG_MACH_TYPE; /* board id for Linux */

#endif

       addr_sp-= sizeof(gd_t);

       id= (gd_t *) addr_sp;

       debug("Reserving%zu Bytes for Global Data at: %08lxn",

                     sizeof(gd_t), addr_sp);

First, reserve malloclen, usually 0x400000, to make a permanent copy of bd and gd, because the environment is almost ready at this time. Reserve space for the global information bd_t structure, and the first address is stored in gd->bd. Reserve space for the gd_t structure. The first address is stored in id. Save this address in gd->irq_sp as the exception stack pointer.

addr_sp += 128; /*leave 32 words for abort-stack */

       gd->irq_sp= addr_sp;

This is the portion of the stack reserved for exceptions.

gd->bd->bi_baudrate = gd->baudrate;

       /* Ram istboard specific, so move it to board code ... */

       dram_init_banksize();

       display_dram_config(); /* and display it */

First, assign gd->baudrate to gd->bd->bi_baudrate, and then initialize BANKS on the board.

gd->relocaddr = addr;

       gd->start_addr_sp = addr_sp;

       gd->reloc_off = addr - (ulong)&_start;

       debug("relocation Offset is:%08lxn", gd->reloc_off);

       if (new_fdt) {

              memcpy(new_fdt, gd->fdt_blob,fdt_size);

              gd->fdt_blob = new_fdt;

       }

       memcpy(id, (void *)gd, sizeof(gd_t));

       return (unsigned int)id;

       The amplitude of the three addresses is mainly the start and end of the redirection and the start address of sp. Finally, the gd structure is copied to the new address. board_init_f ends.

       ldr sp, [r9, #GD_START_ADDR_SP] /* sp =gd->start_addr_sp */

       bic sp, sp, #7 /* 8-byte alignment for ABI compliance */

       ldr r9, [r9, #GD_BD] /* r9 = gd->bd */

       sub r9, r9, #GD_SIZE /* new GD is belowbd */

       ldr r1, __TEXT_BASE

       bl board_init_r

       Execute this section, update sp, update gd address, and jump to board_init_r.

Function: board_init_r

       void board_init_r(gd_t *id, ulongdest_addr)

{

       ulong malloc_start;

#if!defined(CONFIG_SYS_NO_FLASH)

       ulong flash_size;

#endif

       gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */

       bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_R,"board_init_r");

       monitor_flash_len = (ulong)&__rel_dyn_end - (ulong)_start;

       /* Enable caches */

       enable_caches();

       debug("monitor flash len:%08lXn", monitor_flash_len);

       board_init(); /* Setup chipselects */

       Enable caches and do preliminary board-level initialization.

       The following is mainly to do a board-level initialization for example, serial port, clock, Flash peripherals, etc., which will not be introduced in detail here, and then enter      

for (;;) {

              main_loop();

       }

Here in main_loop, we are waiting for our command input and parsing. Here I modified the transplantation method, did not use the -pie option, and made the following changes in board_init_f:

//addr -= gd->mon_len;

//addr &= ~(4096 - 1);

addr = CONFIG_SYS_TEXT_BASE;

It is equivalent to redirecting the code, so it does not jump to relocate_code. Therefore, that part of the code that is more difficult to understand is not analyzed here. Let's analyze it here. If there is anything incorrect, please point it out and let us make progress together.