The MCU Control and Status Register provides information about the reset source that caused the MCU to reset.
In ATmega103 compatibility mode only EXTRF and PORF exist.
• Bit 4 – JTRF: JTAG reset flag The
JTAG reset register can be set by the JTAG instruction AVR_RESET, which causes the MCU to reset and sets JTRF. A power-on reset will clear it to 0, and it can also be cleared by writing “0”.
• Bit 3 – WDRF: Watchdog Reset Flag
This bit is set when a watchdog reset occurs. A power-on reset will clear it to 0 and it can also be cleared by writing a “0” to it.
• Bit 2 – BORF: Brownout Detect Reset Flag
This bit is set when a Brownout Detect Reset occurs. It is cleared by a Power-On Reset and can be cleared by writing a “0” to it.
• Bit 1 – EXTRF: External Reset Flag.
Set when an external reset occurs. A power-on reset will clear it to 0 and it can also be cleared by writing a “0” to it.
• Bit 0 – PORF: Power-on reset flag
Set when a power-on reset occurs. Can only be cleared by writing "0".
To use these reset flags to identify a reset condition, the user should read the data of this register as early as possible and then reset it. If this register is reset before other resets occur, the source of subsequent resets can be known by checking the reset flags.
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