uC/OS II porting experience on ARM

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Most of the work of porting uC/OS-II is concentrated on the porting of the os_cpu_a.s file. The implementation of this file focuses on the architecture of the processor to be ported and the porting principle of uC/OS-II. In this file, the most difficult work is concentrated on the implementation of the two functions OSIntCtxSw and OSTickISR. This is because the implementation of these two functions is related to the porter's porting ideas and the settings of related hardware timers and interrupt registers. In actual porting work, these two places are also prone to errors.


The most important function of OSIntCtxSw is that it completes the task switching directly in the interrupt ISR, thereby improving the speed of real-time response. It happens when the ISR executes to OSIntExit. If a high-priority task is found to have obtained the execution condition because of the waiting time tick, it can be scheduled for execution immediately without returning to the interrupted task and then switching tasks, because that would not be real-time enough.


There are two ways to implement OSIntCtxSw: one is to adjust the sp stack pointer. According to the compiler's processing of function nesting, the sp position that needs to be adjusted is accurately calculated so that the work of saving the scene when entering the interrupt can be reused. The advantage of this method is that the task switch occurs directly inside the function nesting, so that the high-priority task can be scheduled and executed as quickly as possible. However, this method needs to be related to the specific compiler and the setting of the compilation parameters, and requires more skills. The other is to set the flag bit that needs to be switched. No switching occurs in OSIntCtxSw, but a flag that needs to be switched is set. After the function nesting exits from entering OsIntExit => OS_ENTER_CRITICAL() => OSIntCtxSw()=>OS_EXIT_CRITICAL() => OSIntExit, the flag bit is used to determine whether an interrupt-level task switch is required. The advantage of this method is that there is no need to consider compiler factors. There is no need to do calculations, but it is not the fastest in terms of real-time response. However, it is easier to understand and implement this method when you first learn it.


When switching tasks in the interrupt state, one issue that needs special explanation is how to obtain the lr_svc of the interrupted task. Because after entering the interrupt state, lr becomes lr_irq, and the lr_svc of the original task cannot be obtained in the interrupt state. In order to obtain l_svc, a CPU mode forced conversion must be performed in the interrupt ISR, that is, the CPSR is assigned to 0x000000d3. Only after returning to the SVC state can the lr of the original task be obtained. This is very important for task switching. Another issue that needs attention is that after forcing the CPSR to the SVC state, the SPSR will also become SPSR_irq accordingly. In this way, it is necessary to save the SPSR before the forced conversion, that is, the CPSR before the interrupt task is interrupted.


Reference address:uC/OS II porting experience on ARM

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