In-depth analysis of 51 MCU bus timing and expansion based on MOVX instruction

Introduction: This paper analyzes the execution process of the MCS51 MCU accessing the external memory instruction MOVX, and introduces the four elements used by the 51 series MCU; analyzes the 51 MCU in external expansion, bus timing, address decoding method focus, and the method of accessing the address space exceeding 64 KB. Taking the MCS51 MCU experimental instrument developed in the laboratory as an example, this paper analyzes the importance, method and principle of external space development, and gives the MCU system expansion block diagram and address decoding table.

The AT89C51 microcontroller is one of the 51 series microcontrollers designed and produced by ATMEL that is compatible with the MCS51 core. This series of microcontrollers occupies a large market in the control and automation application fields with its superior performance and mature technology. In addition, the 51 microcontroller has the classic bus structure in the computer system, namely: data bus, address bus and control bus.

In practical applications, among the four ports of the microcontroller, port P0 is usually multiplexed as the address/data bus; port P2 is used as the high 8-bit address bus. When there are redundant I/Os, the high 8-bit address lines are used together with external combinational logic circuits to form external bus decoding; port P3 is usually used as the second function, and the I/O provided to users is only port P1. In most applications, it cannot meet the requirements, so the 51 microcontroller system needs to be expanded more or less. In addition, since its internal RAM is only 128 B, it is relatively insufficient when using C language for programming. If necessary, external RAM expansion is required, and the method is the same as expanding external I/O. In practical applications, the use of the bus method can easily realize the operation of external I/O, RAM, LCD, ADC, DAC and other peripherals of the 51 microcontroller to make up for the shortcomings of the on-chip peripherals of the 51 microcontroller.

1 Four elements of MCS51 single chip microcomputer system

1.1 Startup of 51 MCU System

The following four points are required for the MCS51 microcontroller to work properly when powered on:

(1) Power supply. The 40th pin of the AT89S51 series microcontroller is VCC, with an external voltage of 5 V for operating. In addition, the 20th pin of the microcontroller is GND, which must be connected to the system ground.

(2) Reset circuit. Any processor needs to reset itself when powered on, and the 51 single-chip microcomputer is no exception. The power-on reset circuit is one of the simpler and more reliable circuits and is indispensable. The reset circuit is shown in Figure 1, which combines power-on reset and manual reset. Diode D1 can help the system discharge quickly when the system loses power instantly, so that the system can be reset to improve the reliability of the system.

(3) Oscillation circuit. As shown in Figure 2, the 18th and 19th pins of the 51 single-chip microcomputer are two external oscillation pins, which is a typical circuit of the internal oscillation mode. The external 33 pF capacitor can improve the stability of the oscillation.

(4) EA. The AT89S51 microcontroller has 4 KB of program memory inside, and does not require external ROM space. If this is not enough, you can choose AT89S52 or other microcontrollers with larger internal memory, so connect it to a high level, that is, do not use external ROM, only use internal memory.

1.2 Memory structure of MCS51 microcontroller system

The memory of the MCS51 microcontroller is divided into two parts: on-chip and off-chip, namely: internal ROM/RAM and external ROM/RAM. When writing a program, you must be clear about the purpose and function of each storage unit, so that you can better allocate system memory resources. Another feature of the 51 microcontroller is that the external RAM space and I/O space share the external 64 KB space. Because the address line of the external bus is 16 bits, the maximum address space that can be accessed is 64 KB. When the 51 microcontroller system is externally expanded, the addresses of all peripherals are distributed within this 64 KB address range. For RAM, the addresses are continuous; while for LCD, ADC and other components, the addresses are discontinuous.

1.3 51 MCU interrupt system

AT89S51 microcontroller provides users with 5 maskable interrupt sources, namely: external interrupt 0 (entry address: 0003H), external interrupt 1 (entry address: 000BH), timer 0 (entry address: 0013H), timer 1 (entry address: 001BH) and serial interrupt (entry address: 0023H); non-maskable interrupt is reset (entry address: 0000H). The number of interrupts provided by other models of 51 series microcontrollers is different. All microcontrollers include the above 6 most basic interrupt sources. There are slight differences in the interrupt sources of 51 core microcontrollers produced by different companies.

1.4 Bus structure of 51 single chip microcomputer

Since the only port that can be used as a bidirectional I/O port of the 51 MCU is the P1 port, if the system needs to expand an external keyboard, there will be very little I/O left. Therefore, the design of the MCS51 MCU application system inevitably requires system expansion, and the expansion of I/O is closely integrated with the system bus. Since the external RAM and I/O ports of the MCS51 MCU are uniformly addressed, part of the 64 KB RAM space outside the MCU can be used as the address space for expanding the peripheral I/O ports. In this way, the MCU system can use the extra RAM space to expand the I/O space and use the bus to access peripherals [1].

One of the key points of this article is to introduce the use of 74HC244 chip with tri-state buffer and 74HC573 chip with output latch to expand a 4×4 small keyboard. The buffer and latch occupy two addresses in the external I/O space respectively. Whether accessing the external RAM space or I/O space, the MOVX instruction is used to read and write when programming in assembly language. When using C language to design microcontroller programs, although the language has changed, after the C language program is disassembled, the MOVX instruction is still used to access the outside. Therefore, in the analysis process and use, the expansion design is carried out using assembly language as an example.

2 Execution process of MOVX instruction

The MOVX instruction is the only instruction for the 51 microcontroller to access external peripherals. This instruction is required for reading and writing data with external RAM or I/O space or for ADC and DAC. The address space of the MCS51 microcontroller's external RAM is 64 KB, and the address bus is 16 bits. Four assembly instructions can be executed to access peripherals: (1) MOVX A, @DPTR; (2) MOVX @DPTR, A; (3) MOVX A, @RI; (4) MOVX @RI, A. DPTR is a 16-bit address register, the upper 8 bits of the address are stored in DPH, and the lower 8 bits of the address are stored in DPL. Ri (i=0,1) is an 8-bit register, and only the lower 8 bits of the address are stored when used as an address pointer.

When MCS51 executes the above instructions, it is divided into two stages: first, the instruction code is taken out from the program memory and decoded; then, the read and write operations of the peripheral data are performed. In these two stages, the P0 port is a time-sharing multiplexed port during the instruction execution process. In the first half cycle of the instruction, the low 8-bit address is controlled by the address latch enable signal ALE to control an 8-bit latch output, and then the 8-bit data is output to the external data bus. During this process, the P2 port always outputs the high 8-bit address.

As mentioned above, assuming that R0 and R1 are used to access the peripherals by indirect addressing, it can be regarded as a page addressing, which divides the external 64 KB space into 256 pages, each with a 256 B address. The current value of register P2 determines the current page address. When the MCS51 microcontroller is reset, the value of the P2 port register is FFH. If the value in P2 is not changed during program operation, R0 and R1 can only indirectly address the external range of FF00H~FFFFH, that is, access the 255th page. The timing diagram of writing 1 B to the external space is shown in Figure 3.

Therefore, using DPTR as a data pointer or RI can achieve access to the external 64 KB space. The instructions all use MOVX, which shows that the MOVX instruction plays a very important role in the MCS51 microcontroller system.

3 Timing Analysis and System Expansion

The external bus timing expansion of the MCS51 microcontroller mainly includes external decoding circuits, latch circuits and other combinational logic circuits to form the external bus of the entire system, namely: data bus, address bus, and control bus.

The decoding circuit uses the commonly used 74 series 3/8-line decoder 74LS138. The A, B, and C of this chip are connected to the highest 3 bits of the address, namely A13, A14, and A15. The decoding circuit is shown in Figure 4; the enable terminal E3 of 138 is connected to a high level, and E1 and E2 are connected to EN_138. This signal is obtained by combining the read and write signals of the single-chip computer system. When the system reads and writes to the external bus, one of the read/write signals is low, making the EN_138 control signal output a low-level pulse signal. At this time, one of the outputs Y0~Y7 of the 3/8-line decoder will also output a low-level pulse, which can effectively select the external device. The logic circuit is shown in Figure 5.

With this combination, the chip select of the peripheral can be controlled through Y0~Y7 of 74LS138 within the valid data time on the bus to achieve effective data reading and writing. This method is particularly important when using the 74 series logic circuit chip used to expand the external I/O port, because this type of chip has no external read/write signal and can only output a pulse with a read/write signal width through the combinational logic circuit outside the microcontroller to control this type of I/O chip. If the peripheral signal control signal is a low-level pulse, it just matches the output of the 3/8-line decoder, and it can be directly connected at this time; if the peripheral control signal requires a high pulse signal, it must be added to the output of the 3/8-line decoder. A commonly used inverter circuit is 74LS04.