"8-bit image" immediate value format in ARM instructions

I've recently been studying the book "ARM9 Principles and Application Design". When introducing the ARM instruction format, the book points out: "In ARM instructions, if the second operand (operand2) is a constant expression, the constant must correspond to an 8-bit bitmap (Pattern), that is, the constant is obtained by cyclically shifting an 8-bit constant by an even number of bits. For example, 0x3FC, 0, 200, etc. are legal constants, while 0x1FE, 511, etc. are illegal constants."

At first I didn't quite understand this sentence, and I didn't understand the examples given in the book. So I decided to start studying from the source - the ARM instruction format.

The basic format of a typical ARM instruction is {} {S} , {, }, a total of 32 bits. Among them, occupies 12 bits. When using the immediate addressing mode, the data is contained in the 32-bit code of the instruction. Fetching the instruction means fetching the operand that can be used immediately. Now consider the following situation: We want to use the immediate addressing method to perform operations. If a 32-bit immediate number is directly used in the 32-bit instruction encoding, it is possible to completely occupy the 32-bit encoding space, making the instruction's opcode, etc., unable to be reflected in the encoding. If the 12-bit operand2 is used to directly represent the data, the range of numbers that can be represented is slightly smaller. Therefore, in the ARM instruction encoding, the 32-bit effective immediate number is indirectly obtained by cyclically shifting the even number of bits. The specific design method is as follows:

In ARM data processing instructions, when the second operand involved in the operation is an immediate number, each immediate number is indirectly obtained by rotating an 8-bit constant right by an even number of bits, where the number of bits rotated right is represented by 2 times a 4-bit binary number. Then the effective immediate number can be expressed as: := immed_8; Rotate right (2×rotate_imm). Among them: represents the immediate number, immed_8 represents the 8-bit constant, the so-called "8-bit image", and rotate_imm represents the 4-bit rotate right shift value. This raises a problem: although the range of representation has become larger, the number of numbers that can be represented by 12 bits is fixed. Therefore, ARM stipulates that not all 32-bit constants are legal immediate numbers. Only those obtained by the above construction method are legal immediate numbers, and no errors will be reported during compilation.

For example, 
0x3FC (0000 0000 0000 0000 0000 0011 1111 1100) is obtained by rotating 0xff right by 2 bits; 
200 (0000 0000 0000 0000 0000 0000 1100 1000) is obtained by rotating 0xc8 right by 2 bits, and they are both legal. 
However, 0x1FE (0000 0000 0000 0000 0000 0000 0001 1111 1110) and 
511 (0000 0000 0000 0000 0000 0001 1111 1111) cannot be regarded as an 8-bit constant rotated right by an even number of bits, and are therefore illegal.

By comparison, we can conclude as follows:

1. To determine whether a number conforms to the principle of 8-bit bitmap, first check whether the number of 1s in the binary representation of the number does not exceed 8. If not, then check whether these n 1s (n<=8) can be put into 8 binary bits at the same time. If they can be put in, then check whether these eight binary bits can be cyclically right-shifted by even bits to get the number we want to use. If so, this number conforms to the principle of 8-bit bitmap and is a legal immediate number. Otherwise, it does not conform.

2. The 32-bit number that cannot be represented can only be obtained through other means such as logical or arithmetic operations. For example, 0xffffff00 can be obtained by bitwise inversion of 0x000000ff.

Therefore, in future programming, it is important to always check whether the second operand used conforms to the 8-bit bitmap. As for why the 12-bit operand2 is "split 80% to 40%", this question needs to be asked by an expert.