That's a bit of an introduction. Okay, let's start learning something a little more complicated and write a single-button program.
Some people may laugh, this is complicated? Indeed, it is relatively simple to have only one button, but the key is that we need to use this button to lead to the interrupt processing part, which is more core. Interrupts are one of the most important parts of learning a CPU.
This time we will use the initialization file provided by realview and learn to configure it by ourselves (we will write it by ourselves in the future). Then we will complete the function of triggering an interrupt processing function once a key is pressed. How to judge whether an interrupt is triggered? Didn’t we write a serial port program? Once an interrupt occurs, the serial port sends data to the PC.
1 Configuration (configuration corresponding to s3c2410a.s):
I'll take a few screenshots later, as I don't have any screenshot tools at hand right now.
2 Several snippets from s3c2410a.s, focusing on the interrupts.
159IntVT_SETUP
EQU
1
160IntVTAddress
EQU
0x33FFFF20
...........
795
AREA
RESET
,
CODE
,
READONLY
796
ARM
799; Exception Vectors
800; Mapped to Address 0.
801; Absolute addressing mode must be used.
802; Dummy Handlers are implemented as infinite loops which can be modified.
803
804Vectors
LDR
PC
,
Reset_Addr
805
LDR
PC
,
Undef_Addr
806
LDR
PC
,
SWI_Addr
807
LDR
PC
,
PAbt_Addr
808
LDR
PC
,
DAbt_Addr
809
NOP
; Reserved Vector
810
LDR
PC
,
IRQ_Addr
811
LDR
PC
,
FIQ_Addr
813
814
IF
IntVT_SETUP
<>
0
816;Interrupt Vector Table Address
817HandleEINT0
EQU
IntVTAddress
818HandleEINT1
EQU
IntVTAddress
+
4
819HandleEINT2
EQU
IntVTAddress
+
4
*
2
820HandleEINT3
EQU
IntVTAddress
+
4
*
3
821HandleEINT4_7
EQU
IntVTAddress
+
4
*
4
822HandleEINT8_23
EQU
IntVTAddress
+
4
*
5
823HandleReserved
EQU
IntVTAddress
+
4
*
6
850IRQ_Entry
851
sub
sp
,
sp
,
#4 ;reserved for PC
852
stmfd
sp!,{r8-r9} ; backup r8 r9
853
854
ldr
r9
,=
INTOFFSET ; interrupt offset
855
ldr
r9
,[
r9
]
856
ldr
r8
,=
HandleEINT0; Get the base address of the interrupt handling function address
857
add
r8
,
r8
,
r9
,
lsl
#2; Get the actual interrupt handling function address based on the base address and offset
858
ldr
r8
,[
r8
]
859
str
r8
,[
sp
,
#8]
860
ldmfd
sp!,{r8-r9,pc}; Modify the pc pointer and jump to the secondary interrupt processing function
861
862
ENDIF
863
864Reset_Addr
DCD
Reset_Handler
865Undef_Addr
DCD
Undef_Handler
866SWI_Addr
DCD
SWI_Handler
867PAbt_Addr
DCD
PAbt_Handler
868DAbt_Addr
DCD
DAbt_Handler
869
DCD
0
; Reserved Address
870IRQ_Addr
DCD
IRQ_Handler
871FIQ_Addr
DCD
FIQ_Handler
872
873Undef_Handler
B
Undef_Handler
874SWI_Handler
B
SWI_Handler
875PAbt_Handler
B
PAbt_Handler
876DAbt_Handler
B
DAbt_Handler
877
878
IF
IntVT_SETUP
<>
1
879IRQ_Handler
B
IRQ_Handler
880
ENDIF
881
882
IF
IntVT_SETUP
<>
0
883IRQ_Handler
B
IRQ_Entry
884
ENDIF
885
886FIQ_Handler
B
FIQ_Handler
It can be seen that when the irq interrupt is triggered, the cpu automatically saves the cpsr to the spsr and sets the pc pointer to 0x18. After LDR PC, IRQ_Addr, IRQ_Handler B IRQ_Entry, two jumps, it finally jumps to IRQ_ENTRY, which is actually the first-level interrupt processing function. The function of the first-level interrupt processing function is to check the address of its processing function according to the interrupt offset register. Please see the comments in the code.
Because I pasted the code using HTML, it told me that the article was too long, so I had to open a new article.
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Recommended ReadingLatest update time:2024-11-15 07:41
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