STM32F1xx official information:
"STM32 Chinese Reference Manual V10" - Chapter 8 General and Multiplexed Function IO (GPIO and AFIO)
Chip data sheet
STM32 GPIO Introduction
STM32 pin description
GPIO is the abbreviation of general purpose input/output port, which is a controllable pin of STM32. GPIO pins are connected to external hardware devices to realize the functions of external communication, external hardware control or external hardware data collection.
The STM32F103ZET6 chip is a 144-pin chip, including 7 general-purpose input/output (GPIO) groups, namely GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, and each GPIO group has 16 GPIO ports, usually abbreviated as PAx, PBx, PCx, PDx, PEx, PFx, PGx, where x is 0-15.
In addition to being used as GPIO, most of the STM32 pins can also be multiplexed as peripheral function pins (such as serial ports). This is described in detail in [STM32] STM32 port multiplexing and remapping (AFIO auxiliary function clock).
GPIO basic structure
Each GPIO has such a circuit structure inside, which will be introduced in detail below this article.
Here is a brief introduction to the circuit diagram:
Protection diode: The two diodes on the upper and lower sides of the IO pin are used to prevent the pin from being input with excessively high or low voltage. When the pin voltage is higher than VDD, the upper diode is turned on; when the pin voltage is lower than VSS, the lower diode is turned on to prevent abnormal voltage from being introduced into the chip and causing the chip to burn. However, despite this, high-power devices cannot be directly connected externally. The power and isolation circuit drive must be increased to prevent the chip from burning out or the external device from not working properly.
P-MOS tube and N-MOS tube: The unit circuit composed of P-MOS tube and N-MOS tube makes GPIO have "push-pull output" and "open-drain output" modes. The circuit here will be analyzed in detail below.
TTL Schottky trigger: After the signal passes through the trigger, the analog signal is converted into a digital signal of 0 and 1. However, when the GPIO pin is used as the input channel of the ADC to collect voltage, its "analog input" function is used. At this time, the signal no longer passes through the trigger for TTL level conversion. The original analog signal to be collected by the ADC peripheral.
It should be noted here that when looking at the GPIO table in the "STM32 Chinese Reference Manual V10", you will see a column called "FT", which means that this GPIO port is compatible with 3.3V and 5V; if there is no "FT", it means that it is not compatible with 5V.
How STM32 GPIO works
GPIO supports 4 input modes (floating input, pull-up input, pull-down input, analog input) and 4 output modes (open-drain output, open-drain multiplexed output, push-pull output, push-pull multiplexed output). At the same time, GPIO also supports three maximum flip speeds (2MHz, 10MHz, 50MHz).
Each I/O port can be freely programmed, but the I/O port registers must be accessed as 32-bit words.
GPIO_Mode_AIN Analog input
GPIO_Mode_IN_FLOATING Floating input
GPIO_Mode_IPD Pull-down input
GPIO_Mode_IPU Pull-up input
GPIO_Mode_Out_OD Open drain output
GPIO_Mode_Out_PP Push-pull output
GPIO_Mode_AF_OD Multiplexed open-drain output
GPIO_Mode_AF_PP Multiplexed push-pull output
The following will introduce the eight working modes of GPIO:
Floating input mode
In floating input mode, the level signal of the I/O port directly enters the input data register. In other words, the level state of the I/O is uncertain and is completely determined by the external input; if the pin is floating (with no signal input), the level of the port is uncertain.
Pull-up input mode
In the pull-up input mode, the level signal of the I/O port directly enters the input data register. However, when the I/O port is suspended (no signal input), the level of the input terminal can be maintained at a high level; and when the I/O port input is at a low level, the level of the input terminal is still at a low level.
Pull-down input mode
In the pull-down input mode, the level signal of the I/O port directly enters the input data register. However, when the I/O port is suspended (no signal input), the level of the input end can be kept at a low level; and when the I/O port input is at a high level, the level of the input end is still at a high level.
Analog input mode
In analog input mode, the analog signal (voltage signal, not level signal) of the I/O port is directly analog input to the on-chip peripheral module, such as the ADC module, etc.
Open-drain output mode
In open-drain output mode, the value of the register or output data register is set/cleared by setting the bit, and finally output to the I/O port through the N-MOS tube. Here, we should pay attention to the N-MOS tube. When the output value is set to a high level, the N-MOS tube is in a closed state. At this time, the level of the I/O port is not determined by the high or low level of the output, but by the pull-up or pull-down outside the I/O port; when the output value is set to a low level, the N-MOS tube is in an open state, and the level of the I/O port is a low level. At the same time, the level of the I/O port can also be read through the input circuit; note that the level of the I/O port is not necessarily the output level.
Open drain multiplexed output mode
The open-drain multiplexed output mode is very similar to the open-drain output mode, except that the source of the high and low levels of the output is not determined by the CPU directly writing the output data register, but instead by the multiplexing function output of the on-chip peripheral module.
Push-pull output mode
In push-pull output mode, by setting the bit to set/clear the register or the value of the output data register, it passes through the P-MOS tube and the N-MOS tube and is finally output to the I/O port. Here we should pay attention to the P-MOS tube and the N-MOS tube. When the output value is set to a high level, the P-MOS tube is in the open state and the N-MOS tube is in the closed state. At this time, the level of the I/O port is determined by the P-MOS tube: high level; when the output value is set to a low level, the P-MOS tube is in the closed state and the N-MOS tube is in the open state. At this time, the level of the I/O port is determined by the N-MOS tube: low level. At the same time, the level of the I/O port can also be read through the input circuit; note that at this time, the level of the I/O port must be the output level.
Push-pull multiplexed output mode
The push-pull multiplexed output mode is very similar to the push-pull output mode, except that the source of the high and low levels of the output is not determined by the CPU directly writing the output data register, but instead by the multiplexing function output of the on-chip peripheral module.
Summary and Analysis
1. What is push-pull structure and push-pull circuit?
The push-pull structure generally refers to two transistors or MOS tubes with the same parameters being controlled by two complementary signals, and one transistor or MOS tube is always turned on while the other is turned off. The high and low levels are determined by the output level.
The push-pull circuit is a circuit in which two transistors or MOSFETs with the same parameters exist in the circuit in a push-pull manner, each responsible for the waveform amplification task of the positive and negative half cycles. When the circuit is working, only one of the two symmetrical power switch tubes is turned on at a time, so the conduction loss is small and the efficiency is high. The output can both inject current into the load and extract current from the load. The push-pull output stage not only improves the load capacity of the circuit, but also increases the switching speed.
2. What is the difference between open-drain output and push-pull output?
Open drain output: can only output a strong low level, and the high level must be pulled up by an external resistor. The output end is equivalent to the collector of the transistor. It is suitable for current-type driving, and its ability to absorb current is relatively strong (generally within 20ma);
Push-pull output: can output strong high and low levels and connect digital devices.
Regarding push-pull output and open-drain output, we can finally summarize them with the simplest diagram:
The left side of the figure is the push-pull output mode, in which the lower PNP transistor is cut off when the comparator outputs a high level, while the upper NPN transistor is turned on, and the output level is VS+; when the comparator outputs a low level, it is just the opposite, the PNP transistor is turned on, the output is connected to the ground, and it is a low level. The right side can be understood as an open-drain output form, which needs to be pulled up.
3. How to select I/O mode in STM32?
Floating input_IN_FLOATING——Floating input, can be used for KEY recognition, RX1
With pull-up input_IPU——IO internal pull-up resistor input
With pull-down input_IPD——IO internal pull-down resistor input
Analog input_AIN - Apply ADC analog input, or save power in low power consumption
Open drain output_OUT_OD ——IO output 0 is connected to GND, IO output 1 is left floating, and an external pull-up resistor is required to achieve a high output level. When the output is 1, the state of the IO port is pulled high by the pull-up resistor, but because it is an open drain output mode, the IO port can also be changed to a low level or unchanged by an external circuit. The IO input level change can be read to realize the IO bidirectional function of C51
Push-pull output_OUT_PP ——IO output 0 - connected to GND, IO output 1 - connected to VCC, the read input value is unknown
Push-pull output of multiplexed function_AF_PP——On-chip external function (SCL, SDA of I2C)
Multiplexed function open-drain output _AF_OD - on-chip external functions (TX1, MOSI, MISO.SCK.SS)
Previous article:【STM32】GPIO related configuration registers, library functions, bit operations
Next article:【STM32】NVIC interrupt priority management (interrupt vector table)
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